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参数资料
| 型号： | MB89635RP-SH |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 10 MHz, MICROCONTROLLER, PDIP64 |
| 封装： | SHRINK, DIP-64 |
| 文件页数： | 91/153页 |
| 文件大小： | 7326K |
| 代理商： | MB89635RP-SH |
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HARDWARE CONFIGURATION
2-19
[3] STOP mode
Switching to STOP mode
Writing 1 at the STP bit (bit 7) of the STBC register switches the mode to STOP mode.
The STOP mode varies when the main clock is operating and when the subclock is operating.
When the main clock is operating: The main clock stops but the subclock does not stop. All
chip functions except the watch function stop.
When subclock is operating:
Both the main clock and subclock stop. All chip functions
stop.
-The input/output pins and output pins during the STOP mode can be controlled by the SPL bit (bit 5)
of the STBC register so that they are held in the state immediately before entering the STOP mode, or
so that they enter in the high-impedance state.
If an interrupt is requested when 1 is written at the STP bit (bit 7), instruction execution continues with-
out switching to the STOP mode.
In the STOP mode, the values of registers and RAM immediately before entering the STOP mode are
held.
Canceling STOP mode
The STOP mode is canceled either by inputting the reset signal or by requesting an interrupt.
When the reset signal is input during the STOP mode, the CPU is switched to the reset state and the
STOP mode is canceled.
When an interrupt higher than level 11 is requested from the external interrupt circuit during the STOP
mode, the STOP mode is canceled.
When the I flag and IL bit are enabled like an ordinary interrupt after canceling, the CPU executes the
interrupt processing. When they are disabled, the CPU executes the interrupt processing from the
instruction next to the one before entering the STOP mode.
Four oscillation stabilization times of the main clock can be selected by the WT1 and WT0 bits. The
oscillation stabilization time of the subclock is fixed (at 215/fcl -- fcl: frequency of subclock).
If the STOP mode is canceled by inputting the reset signal, the CPU is switched to the oscillation sta-
bilization wait state. Therefore, the reset sequence is not executed unless the oscillation stabi lization
time is elapsed. The oscillation stabilization time corresponds to the oscillation stabiliza tion time of
the main clock selected by the WT1 and WT0 bits. However, when Power-on Reset is not specified by
the mask option, the CPU is not switched to the oscillation stabilization wait state even if the STOP
mode is canceled by inputting the reset signal.
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| MB89PV950CF | 8-BIT, 5 MHz, MICROCONTROLLER, CQFP64 |
| MB89951PFM | 8-BIT, MROM, 5 MHz, MICROCONTROLLER, PQFP64 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MB89636 | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
| MB89636PF | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
| MB89636PFM | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
| MB89636P-SH | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
| MB89636R | 制造商:未知厂家 制造商全称:未知厂家 功能描述:8-bit Proprietary Microcontroller |
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