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参数资料
| 型号： | MB89P538-201PMC |
| 厂商： | FUJITSU LTD |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | MICROCONTROLLER, PQFP64 |
| 封装： | 12 X 12 MM, 1.70 MM HEIGHT, 0.65 MM PITCH, PLASTIC, LQFP-64 |
| 文件页数： | 34/72页 |
| 文件大小： | 2290K |
| 代理商： | MB89P538-201PMC |
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MB89530A Series
4
DS07-12547-7E
(Continued)
*1 : Depends on operating frequency.
*2 : Using external ROM and MBM27C512.
*3 : tinst represents instruction execution time. This can be selected as 1/4, 1/8, 1/16, 1/64 of the main clock cycle
or 1/2 of the sub clock cycle.
Note : MB89535A/537A/538A have no built-in I2C functions.
To use I2C functions, choose the MB89PV530/MB89P538/F538/F538L/537AC/538AC.
Part number
Parameter
MB89535A
MB89537A/
537AC
MB89538A/
538AC
MB89F538/
MB89F538L
MB89P538
MB89PV530
P
e
ri
p
h
e
ral
fu
nct
ion
s
Pulse width
count timer
8-bit one-shot timer operation
(supports underflow output, operating clock period : 1, 4, 32 tinst*3, external)
8-bit reload timer operation
(supports square wave output, operating clock period : 1, 4, 32 tinst*3, external)
8-bit pulse width measurement operation
(continuous measurement, “H” width measurement, “L” width measurement,
↑ to ↑, ↓ to ↓, “H”
width measurement and
↑ to↑)
16-bit timer/
counter
16-bit timer operation (operating clock period : 1 tinst*3, external)
16-bit event counter operation (select rising, falling, or both edges)
16-bit
× 1 channel
Serial I/O
8 bits length
Selection of LSB first or MSB first
Transfer clock (2, 8, 32 tinst*3, external)
UART/SIO
CLK synchronous/CLK asynchronous data transfer capability (8, 9-bit with parity bit, or 7,8-bit
without parity bit) .
Built-in baud rate generator provides selection of 14 baud rate settings.
UART
CLK synchronous/CLK asynchronous data transfer capability (4, 6, 7, 8-bit with parity bit, or 5,
7, 8, 9-bit without parity bit) .
Built-in baud rate generator provides selection of 14 baud rate settings.
External clock output, 2-channel 8-bit PWM timer output also available for baud rate settings.
External
interrupt 1
Single-clock system : 4 channels independent, dual-clock system : 3 channels independent.
Selection of rising, falling, or both edge detection.
Can be used for recovery from standby mode (edge detection also available in stop mode)
External
interrupt 2
Except MB89F538/F538L : 8 channels, MB89F538/F538L : 7 channels
Can be used for recovery from standby mode.
6-bit PPG,
12-bit PPG
Can generate square wave signals with programmable period.
6-bit
× 1 channel or 12-bit × 2 channels.
I2C bus
interface
1-channel , compatible with Intel System Administrator bus version 1.0 and
Philips I2C specifications.
2-line communications (on MB89PV530/P538/F538/F538L/537AC/538AC)
A/D converter
10-bit resolution
× 8 channels.
A/D conversion functions (conversion time : 60 tinst*3)
Supports repeated calls from external clock (except MB89F538/F538L) .
Supports repeated calls from internal clock.
Standard voltage input provided (AVR)
Standby modes
(power saving
modes)
Sleep mode, stop mode, sub clock mode, watch mode.
Process
CMOS
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MB89P538-201P-SH | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:8-bit Original Microcontroller CMOS |
| MB89P538P-101 | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:8-bit Original Microcontroller CMOS, F-2MC-8L MB89530A Series |
| MB89P538P-201 | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:8-bit Original Microcontroller CMOS |
| MB89P538PF-101 | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:8-bit Original Microcontroller CMOS, F-2MC-8L MB89530A Series |
| MB89P538PF-201 | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:8-bit Original Microcontroller CMOS, F-2MC-8L MB89530A Series |
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