
506
APPENDIX A I/O Maps
36
H
IBCR
I
2
C bus control register
R/W
00000000
B
37
H
ICCR
I
2
C clock control register
R/W
0X0XXXXX
B
38
H
IADR
I
2
C address register
R/W
XXXXXXXX
B
39
H
IDAR
I
2
C data register
R/W
XXXXXXXX
B
3A
H
ITCR
I
2
C timeout control register
R/W
X0000000
B
3B
H
ITSR
I
2
C timeout status register
R/W
XXXX0000
B
3C
H
ITOD
I
2
C timeout data register
R/W
XXXXXXXX
B
3D
H
ITOC
I
2
C timeout clock register
R/W
XXXXXXXX
B
3E
H
IMTO
I
2
C master timeout register
R/W
XXXXXXXX
B
3F
H
ISTO
I
2
C slave timeout register
R/W
XXXXXXXX
B
40
H
MBSR
Multi-address I
2
C bus status register
R
00000000
B
41
H
MBCR
Multi-address I
2
C bus control register
R/W
00000000
B
42
H
MCCR
Multi-address I
2
C bus clock control register
R/W
0X0XXXXX
B
43
H
MADR1
Multi-address I
2
C bus address register 1
R/W
XXXXXXXX
B
44
H
MADR2
Multi-address I
2
C bus address register 2
R/W
XXXXXXXX
B
45
H
MADR3
Multi-address I
2
C bus address register 3
R/W
XXXXXXXX
B
46
H
MADR4
Multi-address I
2
C bus address register 4
R/W
XXXXXXXX
B
47
H
MADR5
Multi-address I
2
C bus address register 5
R/W
XXXXXXXX
B
48
H
MADR6
Multi-address I
2
C bus address register 6
R/W
XXXXXXXX
B
49
H
MADR
Multi-address I
2
C bus data register
R/W
XXXXXXXX
B
4A
H
MTCR
Multi-address I
2
C bus timeout control
register
R/W
X0000000
B
4B
H
MTSR
Multi-address I
2
C bus timeout status
register
R/W
XXXX0000
B
4C
H
MTOD
Multi-address I
2
C bus timeout data register
R/W
XXXXXXXX
B
4D
H
MTOC
Multi-address I
2
C bus timeout clock register
R/W
XXXXXXXX
B
4E
H
MMTO
Multi-address I
2
C bus master timeout
register
R/W
XXXXXXXX
B
4F
H
MSTO
Multi-address I
2
C bus slave timeout register
R/W
XXXXXXXX
B
50
H
MALR
Multi-address I
2
C bus ALART register
R/W
XXXX0000
B
51
H
COCR1
Comparator control register 1
R/W
XX000000
B
52
H
COCR2
Comparator control register 2
R/W
XXX11111
B
53
H
COSR1
Comparator status register 1
R/W
00000000
B
Table A-1 I/O Map (Continued)
Address
Abbreviation
of register
Register name
Read and
write
Initial value