参数资料
型号: MB90423GAPMC
厂商: FUJITSU LTD
元件分类: 微控制器/微处理器
英文描述: 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP100
封装: 14 X 14 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-100
文件页数: 5/88页
文件大小: 1991K
代理商: MB90423GAPMC
MB90420G/425G Series
DS07-13711-5E
13
■ HANDLING DEVICES
Precautions for Handling Semiconductor Devices
Strictly observe maximum rated voltages (prevent latchup)
When CMOS integrated circuit devices are subjected to applied voltages higher than VCC at input and output
pins other than medium- and high-withstand voltage pins, or to voltages lower than VSS, or when voltages in
excess of rated levels are applied between VCC and VSS, a phenomenon known as latchup can occur. In a latchup
condition, supply current can increase dramatically and may destroy semiconductor elements. In using semi-
conductor devices, always take sufficient care to avoid exceeding maximum ratings.
Also care must be taken when power to analog systems is switched on or off, to ensure that the analog power
supply (AVCC, AVRH) , analog input and dedicated power supply for the high current output buffer pins (DVCC)
do not exceed the digital power supply (VCC) .
Once the digital power supply (VCC) is switched on, the analog power (AVCC,AVRH) and dedicated power supply
for the high current output buffer pins (DVCC) may be turned on in any sequence.
Stable supply voltage
Even within the warranted operating range of VCC supply voltage, sudden fluctuations in supply voltage can
cause abnormal operation. The recommended stability for ripple fluctuations (P-P values) at commercial fre-
quencies (50 Hz to 60 Hz) should be within 10
% of the standard VCC value, and voltage fluctuations that occur
during switching of power supplies etc. should be limited to transient fluctuation rates of 0.1 V/ms or less.
Power-on procedures
In order to prevent abnormal operation of the internal built-in step-down circuits, voltage rise time during power-
on should be attained within 50
s (0.2 V to 2.7 V) .
Treatment of unused pins
If unused input pins are left open, they may cause abnormal operation or latchup which may lead to permanent
damage to the semiconductor. Any such pins should be pulled up or pulled down through resistance of at least
2 k
.
Any unused input/output pins should be left open in output status, or if found set to input status, they should be
treated in the same way as input pins.
Any unused output pins should be left open.
Treatment of A/D converter power supply pins
Even if the A/D converter is not used, pins should be connected so that AVCC
= VCC, and AVSS = AVRH = VSS.
Use of external clock signals
Even when an external clock is used, a stabilization period is required following a power-on reset or release
from sub clock mode or stop mode. Also, when an external clock is used it should drive only the X0 pin and the
X1 pin should be left open, as shown in the following figure.
X0
X1
OPEN
MB90420G/425G Series
Sample external clock connection
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