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参数资料
| 型号： | MB90F548PF |
| 厂商： | FUJITSU LTD |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP100 |
| 封装： | PLASTIC, QFP-100 |
| 文件页数： | 26/73页 |
| 文件大小： | 1663K |
| 代理商： | MB90F548PF |
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MB90540/545 Series
32
*1: The interrupt request flag is cleared by the I2OS interrupt clear signal.
*2: The interrupt request flag is cleared by the I2OS interrupt clear signal. A stop request is available.
N/A:The interrupt request flag is not cleared by the I2OS interrupt clear signal.
Note: For a peripheral module with two interrupt causes for a single interrupt number, both interrupt request flags
are cleared by the I2OS interrupt clear signal.
Note: At the end of I2OS, the I2OS clear signal will be asserted for all the interrupt flags assigned to the same
interrupt number. If one interrupt flag starts the I2OS and in the meantime another interrupt flag is set by
hardware event, the later event is lost because the flag is cleared by the I2OS clear signal caused by the first
event. So it is recommended not to use the I2OS for this interrupt number.
Note: If I2OS is enabled, I2OS is initiated when one of the two interrupt signals in the same interrupt control register
(ICR) is asserted. This means that different interrupt sources share the same I2OS Descriptor which should
be unique for each interrupt source. For this reason, when one interrupt source uses the I2OS, the other
interrupt should be disabled.
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