参数资料
型号: MB95F108AJWPMC-GE1
厂商: Fujitsu Semiconductor America Inc
文件页数: 50/72页
文件大小: 0K
描述: IC MCU 60K FLASH 64-LQFP
标准包装: 1
系列: F²MC MB95100AM
核心处理器: F²MC-8FX
芯体尺寸: 8-位
速度: 16MHz
连通性: I²C,LIN,SIO,UART/USART
外围设备: LVD,POR,PWM,WDT
输入/输出数: 54
程序存储器容量: 60KB(60K x 8)
程序存储器类型: 闪存
RAM 容量: 2K x 8
电压 - 电源 (Vcc/Vdd): 2.4 V ~ 5.5 V
数据转换器: A/D 12x8/10b
振荡器型: 外部
工作温度: -40°C ~ 85°C
封装/外壳: 64-LQFP
包装: 托盘
产品目录页面: 722 (CN2011-ZH PDF)
配用: 865-1104-ND - KIT STARTER 8FX MCU MB95F108AHS
其它名称: 865-1070
MB95100AM Series
54
DS07-12614-5E
Sampling at the falling edge of sampling clock*1 and enabled serial clock delay*2
(ESCR register : SCES bit
= 1, ECCR register : SCDE bit = 1)
(Vcc
= 5.0 V ± 10%, AVss = Vss = 0.0 V, TA = 40 °C to + 85 °C)
*1 : Provide switch function whether sampling of reception data is performed at rising edge or falling edge of the
serial clock.
*2 : Serial clock delay function is used to delay half clock for the output signal of serial clock.
*3 : Refer to “ (2) Source Clock/Machine Clock” for tMCLK.
Parameter
Sym-
bol
Pin name
Conditions
Value
Unit
Min
Max
Serial clock cycle time
tSCYC
SCK
Internal clock
operating output pin :
CL
= 80 pF + 1 TTL.
5 tMCLK*3
ns
SCK
↓ → SOT delay time
tSLOVI
SCK, SOT
95
+ 95
ns
Valid SIN
→ SCK ↑
tIVSHI
SCK, SIN
tMCLK*3
+ 190
ns
SCK
↑ → valid SIN hold time
tSHIXI
SCK, SIN
0
ns
SOT
→ SCK ↑ delay time
tSOVHI
SCK, SOT
4 tMCLK*3
ns
SCK
SOT
SIN
2.4 V
0.8 V
tSLOVI
2.4 V
0.8 V
0.8 VCC
0.2 VCC
0.8 VCC
0.2 VCC
2.4 V
0.8 V
tSCYC
tSOVHI
tIVSHI
tSHIXI
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