参数资料
型号: MB95F168JAPMC1-GE1
厂商: Fujitsu Semiconductor America Inc
文件页数: 47/76页
文件大小: 0K
描述: IC MCU FLASH 60K ROM 64LQFP
标准包装: 1
系列: F²MC MB95160MA
核心处理器: F²MC-8FX
芯体尺寸: 8-位
速度: 16MHz
连通性: I²C,LIN,SIO,UART/USART
外围设备: LCD,LVD,POR,PWM,WDT
输入/输出数: 52
程序存储器容量: 60KB(60K x 8)
程序存储器类型: 闪存
RAM 容量: 2K x 8
电压 - 电源 (Vcc/Vdd): 2.4 V ~ 5.5 V
数据转换器: A/D 8x8/10b
振荡器型: 外部
工作温度: -40°C ~ 85°C
封装/外壳: 64-LQFP
包装: 托盘
产品目录页面: 722 (CN2011-ZH PDF)
其它名称: 865-1078
MB95160MA Series
DS07–12624–3E
51
(8) I2C Timing
(VCC
= 5.0 V ± 10%, AVSS = VSS = 0.0 V, TA = 40 °C to + 85 °C)
*1 : R, C : Pull-up resistor and load capacitor of the SCL and SDA lines.
*2 : The maximum tHD;DAT have only to be met if the device dose not stretch the “L” width (tLOW) of the SCL signal.
*3 : A fast-mode I2C-bus device can be used in a standard-mode I2C-bus system, but the requirement
tSU;DAT
≥ 250 ns must then be met.
*4 : Refer to “
Note of SDA and SCL set-up time”.
The rating of the input data set-up time in the device connected to the bus cannot be satisfied depending on
the load capacitance or pull-up resistor.
Be sure to adjust the pull-up resistor of SDA and SCL if the rating of the input data set-up time cannot be
satisfied.
Parameter
Symbol
Pin
name
Conditions
Value
Unit
Standard-mode
Fast-mode
MinMax
SCL clock frequency
fSCL
SCL0
R
= 1.7 kΩ,
C
= 50 pF*1
01000400
kHz
(Repeat) Start condition hold
time SDA
↓ → SCL ↓
tHD;STA
SCL0
SDA0
4.0
0.6
μs
SCL clock “L” width
tLOW
SCL0
4.7
1.3
μs
SCL clock “H” width
tHIGH
SCL0
4.0
0.6
μs
(Repeat) Start condition setup
time SCL
↑ → SDA ↓
tSU;STA
SCL0
SDA0
4.7
0.6
μs
Data hold time SCL
↓ →
SDA
↓ ↑
tHD;DAT
SCL0
SDA0
03.45*2
00.9*3
μs
Data setup time SDA
↓ ↑ →
SCL
tSU;DAT
SCL0
SDA0
0.25*4
0.1*4
μs
Stop condition setup time
SCL
↑ → SDA ↑
tSU;STO
SCL0
SDA0
4.0
0.6
μs
Bus free time between stop
condition and start condition
tBUF
SCL0
SDA0
4.7
1.3
μs
SDA0
SCL0
6TMCLK
Note of SDA and SCL set-up time
Input data set-up time
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