参数资料
型号: MB96F348HSBPMC-GSE2
厂商: Fujitsu Semiconductor America Inc
文件页数: 53/118页
文件大小: 0K
描述: IC MCU 544KB FLASH/ROM 100LQFP
标准包装: 1
系列: F²MC MB96340
核心处理器: F²MC-16FX
芯体尺寸: 16-位
速度: 56MHz
连通性: CAN,EBI/EMI,I²C,LIN,SCI,UART/USART
外围设备: DMA,LVD,LVR,POR,PWM,WDT
输入/输出数: 82
程序存储器容量: 544KB(544K x 8)
程序存储器类型: 闪存
RAM 容量: 24K x 8
电压 - 电源 (Vcc/Vdd): 3 V ~ 5.5 V
数据转换器: A/D 24x10b
振荡器型: 内部
工作温度: -40°C ~ 125°C
封装/外壳: 100-LQFP
包装: 托盘
配用: 865-1100-ND - KIT BUNDLE 100PMC KIT/SOFTWARE
其它名称: 865-1085
MB96340 Series
Specication
4
FME/EMDC- 2007-9-12
MB96300_DS_features.fm
PRELIMINARY
CAN
Supports CAN protocol version 2.0 part A and B
ISO16845 certified
Bit rates up to 1 Mbit/s
32 message objects
Each message object has its own identifier mask
Programmable FIFO mode (concatenation of message objects)
Maskable interrupt
Disabled Automatic Retransmission mode for Time Triggered CAN applications
Programmable loop-back mode for self-test operation
USART
Full duplex USARTs (SCI/LIN)
Wide range of baud rate settings using a dedicated reload timer
Special synchronous options for adapting to different synchronous serial protocols
LIN functionality working either as master or slave LIN device
I2C
Up to 400 kbit/s
Master and Slave functionality, 8-bit and 10-bit addressing
A/D converter
SAR-type
10bit resolution
Signals interrupt on conversion end, single conversion mode, continuous conversion
mode, stop conversion mode, activation by software, external trigger or reload timer
A/D Converter Refer-
ence Voltage switch
2 independant positive A/D converter reference voltages available
Reload Timers
16-bit wide
Prescaler with 1/21, 1/22, 1/23, 1/24, 1/25, 1/26 of peripheral clock frequency
Event count function
Free Running Timers
Signals an interrupt on overflow, supports timer clear upon match with Output
Compare (0, 4), Prescaler with 1, 1/21, 1/22, 1/23, 1/24, 1/25, 1/26 , 1/27 ,1/28
of
peripheral clock frequency
Input Capture Units
16-bit wide
Signals an interrupt upon external event
Rising edge, falling edge or rising & falling edge sensitive
Output Compare Units
16-bit wide
Signals an interrupt when a match with 16-bit I/O Timer occurs
A pair of compare registers can be used to generate an output signal.
Feature
Description
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