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参数资料
| 型号： | MC-4532DA727XFA-A75 |
| 厂商： | ELPIDA MEMORY INC |
| 元件分类： | DRAM |
| 英文描述： | 32 M-WORD BY 72-BIT SYNCHRONOUS DYNAMIC RAM MODULE REGISTERED TYPE |
| 中文描述： | 32M X 72 SYNCHRONOUS DRAM MODULE, 5.4 ns, DMA168 |
| 封装： | DIMM-168 |
| 文件页数： | 11/14页 |
| 文件大小： | 168K |
| 代理商： | MC-4532DA727XFA-A75 |
EOL
Product
Data Sheet E0279N10 (Ver. 1.0)
6
MC-4532DA727XFA
DC Characteristics (Recommended Operating Conditions unless otherwise noted)
Parameter
Symbol
Test condition
Grade
MIN.
MAX.
Unit
Notes
Operating current
ICC1
Burst length = 1
/CAS latency = 2
-A75
2,200
mA
1
tRC
≥ tRC (MIN.), IO = 0 mA
/CAS latency = 3
-A75
2,290
Precharge standby current in
ICC2P
CKE
≤ VIL (MAX.), tCK = 15 ns
268
mA
power down mode
ICC2PS
CKE
≤ VIL (MAX.), tCK = ∞
98
Precharge standby current in
ICC2N
CKE
≥ VIH (MIN.), tCK = 15 ns, /CS ≥ VIH (MIN.),
610
mA
non power down mode
Input signals are changed one time during 30 ns.
ICC2NS
CKE
≥ VIH (MIN.), tCK = ∞, Input signals are stable.
224
Active standby current in
ICC3P
CKE
≤ VIL (MAX.), tCK = 15 ns
340
mA
power down mode
ICC3PS
CKE
≤ VIL (MAX.), tCK = ∞
152
Active standby current in
ICC3N
CKE
≥ VIH (MIN.), tCK = 15 ns, /CS ≥ VIH (MIN.),
790
mA
non power down mode
Input signals are changed one time during 30 ns.
ICC3NS
CKE
≥ VIH (MIN.), tCK = ∞, Input signals are stable.
440
Operating current
ICC4
tCK
≥ tCK (MIN.), IO = 0 mA
/CAS latency = 2
-A75
2,290
mA
2
(Burst mode)
/CAS latency = 3
-A75
2,920
CBR (Auto) Refresh current
ICC5
tRC
≥ tRC (MIN.)
/CAS latency = 2
-A75
4,540
mA
3
/CAS latency = 3
-A75
4,720
Self refresh current
ICC6
CKE
≤ 0.2 V
286
mA
Input leakage current
II (L)
VI = 0 to 3.6 V, All other pins not under test = 0 V
–20
+20
A
Output leakage current
IO (L)
DOUT is disabled, VO = 0 to 3.6 V
–1.5
+1.5
A
High level output voltage
VOH
IO = –4.0 mA
2.4
V
Low level output voltage
VOL
IO = +4.0 mA
0.4
V
Notes 1. ICC1 depends on output loading and cycle rates. Specified values are obtained with the output open. In
addition to this, ICC1 is measured on condition that addresses are changed only one time during tCK (MIN.).
2. ICC4 depends on output loading and cycle rates. Specified values are obtained with the output open. In
addition to this, ICC4 is measured on condition that addresses are changed only one time during tCK (MIN.).
3. ICC5 is measured on condition that addresses are changed only one time during tCK (MIN.).
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