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参数资料
| 型号： | MC-4532DA727XFA-A75 |
| 厂商： | ELPIDA MEMORY INC |
| 元件分类： | DRAM |
| 英文描述： | 32 M-WORD BY 72-BIT SYNCHRONOUS DYNAMIC RAM MODULE REGISTERED TYPE |
| 中文描述： | 32M X 72 SYNCHRONOUS DRAM MODULE, 5.4 ns, DMA168 |
| 封装： | DIMM-168 |
| 文件页数： | 13/14页 |
| 文件大小： | 168K |
| 代理商： | MC-4532DA727XFA-A75 |
EOL
Product
Data Sheet E0279N10 (Ver. 1.0)
8
MC-4532DA727XFA
Synchronous Characteristics
Parameter
Symbol
-A 75
Unit
Note
MIN.
MAX.
Clock cycle time
/CAS latency = 3
tCK3
7.5
(133 MHz)
ns
/CAS latency = 2
tCK2
10
(100 MHz)
ns
Access time from CLK
/CAS latency = 3
tAC3
5.4
ns
1
/CAS latency = 2
tAC2
6.0
ns
1
Input clock frequency
50
133
MHz
Input CLK duty cycle
45
55
%
Data-out hold time
tOH
2.7
ns
1
Data-out low-impedance time
tLZ
0
ns
Data-out high-impedance time
/CAS latency = 3
tHZ3
3.0
5.4
ns
/CAS latency = 2
tHZ2
3.0
6.0
ns
Data-in setup time
tDS
1.5
ns
Data-in hold time
tDH
0.8
ns
Address setup time
tAS
1.5
ns
Address hold time
tAH
0.8
ns
CKE setup time
tCKS
1.5
ns
CKE hold time
tCKH
0.8
ns
CKE setup time (Power down exit)
tCKSP
1.5
ns
Command (/CS0, /CS2, /RAS, /CAS, /WE,
tCMS
1.5
ns
DQMB0 - DQMB7) setup time
Command (/CS0, /CS2, /RAS, /CAS, /WE,
tCMH
0.8
ns
DQMB0 - DQMB7) hold time
Note 1. Output load
Output
Z = 50
50 pF
Remark These specifications are applied to the monolithic device.
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