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参数资料
| 型号： | MC100EL15D |
| 厂商： | MOTOROLA INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 1:4 Clock Distribution Chip |
| 中文描述： | 100EL SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 4 INVERTED OUTPUT(S), PDSO16 |
| 封装： | PLASTIC, SOIC-16 |
| 文件页数： | 1/4页 |
| 文件大小： | 74K |
| 代理商： | MC100EL15D |
SEMICONDUCTOR TECHNICAL DATA
3–1
REV 2
Motorola, Inc. 1996
5/95
The MC10EL/100EL15 is a low skew 1:4 clock distribution chip
designed explicitly for low skew clock distribution applications. The
device can be driven by either a differential or single-ended ECL or, if
positive power supplies are used, PECL input signal. If a single-ended
input is to be used the VBB output should be connected to the CLK input
and bypassed to ground via a 0.01
μ
F capacitor. The VBB output is
designed to act as the switching reference for the input of the EL15 under
single-ended input conditions, as a result this pin can only source/sink up
to 0.5mA of current.
The EL15 features a multiplexed clock input to allow for the distribution
of a lower speed scan or test clock along with the high speed system
clock. When LOW (or left open and pulled LOW by the input pulldown
resistor) the SEL pin will select the differential clock input.
The common enable (EN) is synchronous so that the outputs will only
be enabled/disabled when they are already in the LOW state. This avoids
any chance of generating a runt clock pulse when the device is
enabled/disabled as can happen with an asynchronous control. The
internal flip flop is clocked on the falling edge of the input clock, therefore
all associated specification limits are referenced to the negative edge of
the clock input.
50ps Output-to-Output Skew
Synchronous Enable/Disable
Multiplexed Clock Input
75k
Internal Input Pulldown Resistors
>1000V ESD Protection
LOGIC DIAGRAM AND PINOUT ASSIGNMENT
Q0
Q1
Q2
Q3
15
16
14
13
12
11
10
2
1
3
4
5
6
7
VCC
9
8
Q3
Q2
Q1
Q0
EN
SCLK
CLK
CLK
VBB
SEL
VEE
D
Q
1 0
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B-05
1
16
PIN
FUNCTION
CLK
SCLK
EN
SEL
VBB
Q0–3
Diff Clock Inputs
Scan Clock Input
Sync Enable
Clock Select Input
Reference Output
Diff Clock Outputs
PIN DESCRIPTION
CLK
L
H
X
X
X
SCLK
X
X
L
H
X
SEL
L
L
H
H
X
EN
L
L
L
L
H
Q
L
H
L
H
L*
FUNCTION TABLE
* On next negative transition of
CLK or SCLK
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| MC100LVEL01D | 4-Input OR/NOR |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MC100EL15DG | 功能描述:时钟驱动器及分配 5V ECL 1:4 Clock Distribution RoHS:否 制造商:Micrel 乘法/除法因子:1:4 输出类型:Differential 最大输出频率:4.2 GHz 电源电压-最大: 电源电压-最小:5 V 最大工作温度:+ 85 C 封装 / 箱体:SOIC-8 封装:Reel |
| MC100EL15DR2 | 功能描述:时钟驱动器及分配 5V ECL 1:4 Clock RoHS:否 制造商:Micrel 乘法/除法因子:1:4 输出类型:Differential 最大输出频率:4.2 GHz 电源电压-最大: 电源电压-最小:5 V 最大工作温度:+ 85 C 封装 / 箱体:SOIC-8 封装:Reel |
| MC100EL15DR2G | 功能描述:时钟驱动器及分配 5V ECL 1:4 Clock Distribution RoHS:否 制造商:Micrel 乘法/除法因子:1:4 输出类型:Differential 最大输出频率:4.2 GHz 电源电压-最大: 电源电压-最小:5 V 最大工作温度:+ 85 C 封装 / 箱体:SOIC-8 封装:Reel |
| MC100EL16 | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:5.0 V ECL Differential Receiver |
| MC100EL1648 | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:5 VECL Voltage Controlled Oscillator Amplifier |
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