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参数资料
| 型号： | MC100EP446FAR2 |
| 厂商： | ON Semiconductor |
| 文件页数： | 8/20页 |
| 文件大小： | 0K |
| 描述： | IC CONV 8BIT SER/PAR ECL 32LQFP |
| 产品变化通告： | LTB Notification 03/Jan/2008 |
| 标准包装： | 1 |
| 应用： | 数据管理 |
| 接口： | 差分 |
| 电源电压： | 3 V ~ 5.5 V |
| 封装/外壳： | 32-LQFP |
| 供应商设备封装： | 32-LQFP（7x7） |
| 包装： | 剪切带 (CT) |
| 安装类型： | 表面贴装 |
| 其它名称： | MC100EP446FAROSCT |
MC10EP446, MC100EP446
http://onsemi.com
16
The differential synchronous CKEN inputs (Pins 6 and 7), disable the internal clock circuitry. The synchronous CKEN will
suspend all of the device activities and prevent runt pulses from being generated. The rising edge of CKEN followed by the
falling edge of CLK will suspend all activities. The falling edge of CKEN followed by the falling edge of CLK will resume
all activities (Figure 13).
Figure 13. Timing Diagram with CKEN with CKSEL HIGH
CLK
CKEN
SOUT
CKSEL
D11
D01D21D31
PCLK
D41D51
Internal Clock
Disabled
Internal Clock
Enabled
The differential PCLK output (Pins 14 and 15) is a word
framer and can help the user synchronize the serial data
output, SOUT (Pins 11 and 12), in their applications.
Furthermore, PCLK can be used as a trigger for input
parallel data (Figure 14).
An internally generated voltage supply, the VBB pin, is
available to this device only. For single–ended input
conditions, the unused differential input is connected to VBB
as a switching reference voltage. VBB may also rebias AC
coupled inputs. When used, decouple VBB and VCC via a
0.01
mF capacitor and limit current sourcing or sinking to
0.5 mA. When not used, VBB should be left open. Also, both
outputs of the differential pair must be terminated (50
W to
VTT) even if only one output is used.
Figure 14. PCLK as Trigger Application
TRIGGER
Pattern Generator
Data Format Logic
(FPGA, ASIC)
PARALLEL
DA
TA
OUTPUT
CLK
PCLK
EP446
PARALLEL DA
TA
INPUT
SYNC
SOUT SERIAL DATA
CLK
RESET
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MC100EP446FAR2G | 功能描述:串行到并行逻辑转换器 3.3V/5V ECL 8-Bit Serial to Parallel RoHS:否 制造商:Supertex 工作电源电压: 安装风格:SMD/SMT 封装 / 箱体:QFN-32 封装:Tray |
| MC100EP446MNG | 功能描述:串行到并行逻辑转换器 ECL PARA T/SERIAL RoHS:否 制造商:Supertex 工作电源电压: 安装风格:SMD/SMT 封装 / 箱体:QFN-32 封装:Tray |
| MC100EP446MNR4G | 功能描述:串行到并行逻辑转换器 ECL PARA T/SERIAL RoHS:否 制造商:Supertex 工作电源电压: 安装风格:SMD/SMT 封装 / 箱体:QFN-32 封装:Tray |
| MC100EP451 | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:3.3V / 5VECL 6-Bit Differential Register with Master Reset |
| MC100EP451FA | 功能描述:触发器 3.3V/5V ECL 6-Bit RoHS:否 制造商:Texas Instruments 电路数量:2 逻辑系列:SN74 逻辑类型:D-Type Flip-Flop 极性:Inverting, Non-Inverting 输入类型:CMOS 输出类型: 传播延迟时间:4.4 ns 高电平输出电流:- 16 mA 低电平输出电流:16 mA 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:X2SON-8 封装:Reel |
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