参数资料
型号: MC10135P
厂商: MOTOROLA INC
元件分类: 通用总线功能
英文描述: Replaced by SN54LS175 : Quadruple D-type Flip-Flops With Clear 16-CFP -55 to 125
中文描述: 10K SERIES, POSITIVE EDGE TRIGGERED JBAR-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
封装: PLASTIC, DIP-16
文件页数: 1/5页
文件大小: 110K
代理商: MC10135P
LOGIC DIAGRAM
VCC1= PIN 1
VCC2= PIN 16
VEE= PIN 8
S1 5
J1 7
K1 6
R1 4
C 9
S2 12
J2 10
K2 11
R2 13
Q1
Q1
Q2
Q2
2
3
15
14
SEMICONDUCTOR TECHNICAL DATA
3–22
REV 5
Motorola, Inc. 1996
3/93
The MC10135 is a dual master–slave dc coupled J–K flip–flop. Asynchro–
nous set (S) and reset (R) are provided. The set and reset inputs override the
clock.
A common clock is provided with separate J–K inputs. When the clock is
static, the J–K inputs do not effect the output.
The output states of the flip–flop change on the positive transition of the
clock.
PD= 280 mW typ/pkg (No Load)
fTog= 140 MHz typ
tpd= 3.0 ns typ
tr, tf= 2.5 ns typ (20%–80%)
R–S TRUTH TABLE
CLOCK J–K TRUTH TABLE*
R
S
Qn+1
Qn
H
L
N.D.
J
K
Qn+1
Qn
L
H
Qn
L
L
H
H
L
H
L
H
L
H
L
H
L
L
H
H
N.D. = Not Defined
*Output states change on positive
transition of clock for J–K input
condition present.
DIP
PIN ASSIGNMENT
VCC1
Q1
Q1
R1
S1
K1
J1
VEE
VCC2
Q2
Q2
R2
S2
K2
J2
C
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
相关PDF资料
PDF描述
MC10136FN Universal Hexadecimal Counter
MC10136 Universal Hexadecimal Counter
MC10136L 9-Bit Odd/Even Parity Generators/Checkers 14-CDIP -55 to 125
MC10136P Universal Hexadecimal Counter
MC10137L Replaced by CD54HCT191 : Synchronous Up/Down Counters With Down/Up Mode Control 16-CDIP -55 to 125
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