参数资料
| 型号： | MC10EP016FAG |
| 厂商： | ON Semiconductor |
| 文件页数： | 3/15页 |
| 文件大小： | 0K |
| 描述： | IC COUNTER 8BIT SYNC ECL 32LQFP |
| 标准包装： | 250 |
| 系列： | 10EP |
| 逻辑类型： | 二进制计数器 |
| 方向： | 上 |
| 元件数： | 1 |
| 每个元件的位元数： | 8 |
| 复位： | 异步 |
| 计时： | 同步 |
| 计数速率： | 1.4GHz |
| 触发器类型： | 正，负 |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | -40°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-LQFP |
| 供应商设备封装： | 32-LQFP（7x7） |
| 包装： | 托盘 |
| 其它名称： | MC10EP016FAGOS |
MC10EP016, MC100EP016
http://onsemi.com
11
Applications Information (continued)
H
L
H
LLL
H
TC
PE
CE
TCLD
CLK
P7
P6
P4
P3
P2
P1 P0
P5
Q7 Q6
Q4 Q3
Q2 Q1 Q0
Q5
Figure 5. Mod 2 to 256 Programmable Divider
CLK
COUT
To determine what value to load into the device to
accomplish the desired division, the designer simply
subtracts the binary equivalent of the desired divide ratio
from the binary value for 256. As an example for a divide
ratio of 113:
Pn's = 256 - 113 = 8F16 = 1000 1111
where:
P0 = LSB and P7 = MSB
Forcing this input condition as per the setup in Figure 5
will result in the waveforms of Figure 6. Note that the TC
output is used as the divide output and the pulse duration is
equal to a full clock period. For even divide ratios, twice the
desired divide ratio can be loaded into the EP016 and the TC
output can feed the clock input of a toggle flip flop to create
a signal divided as desired with a 50% duty cycle.
Table 13. PRESET VALUES FOR VARIOUS DIVIDE
RATIOS
Divide
Ratio
Preset Data Inputs
P7
P6
P5
P4
P3
P2
P1
P0
2
H
L
3
H
HHHH
L
H
4
H
HHHH
L
5
H
HHH
L
H
w
w
112
H
L
H
LLL
L
113
H
L
HHH
H
114
H
L
HHH
L
254
L
LLLL
H
L
255
L
LLLLL
H
256
L
A single EP016 can be used to divide by any ratio from 2
to 256 inclusive. If divide ratios of greater than 256 are
needed multiple EP016s can be cascaded in a manner similar
to that already discussed. When EP016s are cascaded to
build larger dividers the TCLD pin will no longer provide a
means for loading on terminal count. Because one does not
want to reload the counters until all of the devices in the
chain have reached terminal count, external gating of the TC
pins must be used for multiple EP016 divider chains.
PE
CLK
TC
Load
DIVIDE BY 113
Load
1001 0000
1001 0001
1111 1100
1111 1101
1111 1110
1111 1111
Figure 6. Divide by 113 EP016 Programmable Divider Waveforms
相关PDF资料 |
PDF描述 |
|---|---|
| MC100EP32DTG | IC DIVIDER DIV X2 ECL CLK 8TSSOP |
| MC100EL33DG | IC DIVIDER DIV X4 ECL DIFF 8SOIC |
| MC100LVEL32DG | IC DIVIDER DIV X2 ECL 3.3V 8SOIC |
| MC10EL33DG | IC DIVIDER DIV X4 ECL DIFF 8SOIC |
| MC10EL32DG | IC DIVIDER DIV X2 ECL DIFF 8SOIC |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MC10EP016FAR2 | 功能描述:计数器移位寄存器 3.3V/5V ECL 8-Bit RoHS:否 制造商:Texas Instruments 计数器类型: 计数顺序:Serial to Serial/Parallel 电路数量:1 封装 / 箱体:SOIC-20 Wide 逻辑系列: 逻辑类型: 输入线路数量:1 输出类型:Open Drain 传播延迟时间:650 ns 最大工作温度:+ 125 C 最小工作温度:- 40 C 封装:Reel |
| MC10EP016FAR2G | 功能描述:计数器移位寄存器 3.3V/5V ECL 8-Bit Synchronous Binary RoHS:否 制造商:Texas Instruments 计数器类型: 计数顺序:Serial to Serial/Parallel 电路数量:1 封装 / 箱体:SOIC-20 Wide 逻辑系列: 逻辑类型: 输入线路数量:1 输出类型:Open Drain 传播延迟时间:650 ns 最大工作温度:+ 125 C 最小工作温度:- 40 C 封装:Reel |
| MC10EP01D | 功能描述:逻辑门 3.3V/5V ECL 4-Input RoHS:否 制造商:Texas Instruments 产品:OR 逻辑系列:LVC 栅极数量:2 线路数量（输入/输出）:2 / 1 高电平输出电流:- 16 mA 低电平输出电流:16 mA 传播延迟时间:3.8 ns 电源电压-最大:5.5 V 电源电压-最小:1.65 V 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:DCU-8 封装:Reel |
| MC10EP01DG | 功能描述:逻辑门 3.3V/5V ECL 4-Input OR/NOR RoHS:否 制造商:Texas Instruments 产品:OR 逻辑系列:LVC 栅极数量:2 线路数量（输入/输出）:2 / 1 高电平输出电流:- 16 mA 低电平输出电流:16 mA 传播延迟时间:3.8 ns 电源电压-最大:5.5 V 电源电压-最小:1.65 V 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:DCU-8 封装:Reel |
| MC10EP01DR2 | 功能描述:逻辑门 3.3V/5V ECL 4-Input RoHS:否 制造商:Texas Instruments 产品:OR 逻辑系列:LVC 栅极数量:2 线路数量（输入/输出）:2 / 1 高电平输出电流:- 16 mA 低电平输出电流:16 mA 传播延迟时间:3.8 ns 电源电压-最大:5.5 V 电源电压-最小:1.65 V 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:DCU-8 封装:Reel |
发布紧急采购，3分钟左右您将得到回复。