Semiconductor Components Industries, LLC, 2000
March, 2000 – Rev. 5
1
Publication Order Number:
MC14536B/D
MC14536B
Programmable Timer
The MC14536B programmable timer is a 24–stage binary ripple
counter with 16 stages selectable by a binary code. Provisions for an
on–chip RC oscillator or an external clock are provided. An on–chip
monostable circuit incorporating a pulse–type output has been
included. By selecting the appropriate counter stage in conjunction
with the appropriate input clock frequency, a variety of timing can be
achieved.
24 Flip–Flop Stages — Will Count From 20 to 224
Last 16 Stages Selectable By Four–Bit Select Code
8–Bypass Input Allows Bypassing of First Eight Stages
Set and Reset Inputs
Clock Inhibit and Oscillator Inhibit Inputs
On–Chip RC Oscillator Provisions
On–Chip Monostable Output Provisions
Clock Conditioning Circuit Permits Operation With Very Long Rise
and Fall Times
Test Mode Allows Fast Test Sequence
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
MAXIMUM RATINGS (Voltages Referenced to VSS) (Note 2.)
Symbol
Parameter
Value
Unit
VDD
DC Supply Voltage Range
– 0.5 to +18.0
V
Vin, Vout
Input or Output Voltage Range
(DC or Transient)
– 0.5 to VDD + 0.5
V
Iin, Iout
Input or Output Current
(DC or Transient) per Pin
±10
mA
PD
Power Dissipation,
per Package (Note 3.)
500
mW
TA
Operating Temperature Range
– 55 to +125
°C
Tstg
Storage Temperature Range
– 65 to +150
°C
TL
Lead Temperature
(8–Second Soldering)
260
°C
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/
_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high–impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS v (Vin or Vout) v VDD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either VSS or VDD). Unused outputs must be left open.
http://onsemi.com
A
= Assembly Location
WL or L
= Wafer Lot
YY or Y
= Year
WW or W = Work Week
Device
Package
Shipping
ORDERING INFORMATION
MC14536BCP
PDIP–16
2000/Box
MC14536BDW
SOIC–16
47/Rail
MARKING
DIAGRAMS
1
16
PDIP–16
P SUFFIX
CASE 648
MC14536BCP
AWLYYWW
MC14536BDWR2
SOIC–16
1000/Tape & Reel
SOIC–16
DW SUFFIX
CASE 751G
1
16
14536B
AWLYYWW
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
SOEIAJ–16
F SUFFIX
CASE 966
1
16
MC14536B
AWLYWW
MC14536BF
SOEIAJ–16
See Note 1.