参数资料
型号: MC14557BFL1
厂商: ON SEMICONDUCTOR
元件分类: 计数移位寄存器
英文描述: 4000/14000/40000 SERIES, 64-BIT RIGHT SERIAL IN SERIAL OUT SHIFT REGISTER, COMPLEMENTARY OUTPUT, PDSO16
封装: EIAJ, PLASTIC, SOIC-16
文件页数: 10/10页
文件大小: 202K
代理商: MC14557BFL1
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Short Desc
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Data Sheet
1-to-64 Bit Variable Length Shift Register
169 kB PDF
Device MC14557B
1 To 64 Bit Variable Length Shift Register
The MC14557B is a static clocked serial shift register whose length may be programmed to be any number of
bits between 1 and 64. The number of bits selected is equal to the sum of the subscripts of the enabled Length
Control inputs (L1, L2, L4, L8, L16, and L32) plus one. Serial data may be selected from the A or B data inputs
with the A/B select input. This feature is useful for recirculation purposes. A Clock Enable (CE) input is
provided to allow gating of the clock or negative edge clocking capability.
The device can be effectively used for variable digital delay lines or simply to implement odd length shift
registers.
Features:
l
1-64 Bit Programmable Length
l
Q and Qbar Serial Buffered Outputs
l
Asynchronous Master Reset
l
All Inputs Buffered
l
No Limit On Clock Rise and Fall Times
l
Supply Voltage Range = 3.0 Vdc to 18 Vdc
l
Capable of Driving Two Low-power TTL Loads or one Low-power
Schottky TTL Load Over the Rated Temperature Range
Orderable Parts
相关PDF资料
PDF描述
MC14558BALDS 4000/14000/40000 SERIES, SEVEN SEGMENT DECODER/DRIVER, TRUE OUTPUT, CDIP16
MC14558BCLD 4000/14000/40000 SERIES, SEVEN SEGMENT DECODER/DRIVER, TRUE OUTPUT, CDIP16
MC14558BCPDS 4000/14000/40000 SERIES, SEVEN SEGMENT DECODER/DRIVER, TRUE OUTPUT, PDIP16
MC14558BCLDS 4000/14000/40000 SERIES, SEVEN SEGMENT DECODER/DRIVER, TRUE OUTPUT, CDIP16
MC14560BALD 4000/14000/40000 SERIES, 4-BIT ADDER/SUBTRACTOR, CDIP16
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