参数资料
型号: MC33178DR2G
厂商: ON Semiconductor
文件页数: 4/19页
文件大小: 0K
描述: IC OPAMP DUAL LP LOW NOISE 8SOIC
标准包装: 1
放大器类型: 通用
电路数: 2
转换速率: 2 V/µs
增益带宽积: 5MHz
电流 - 输入偏压: 100nA
电压 - 输入偏移: 1500µV
电流 - 电源: 1.7mA
电流 - 输出 / 通道: 100mA
电压 - 电源,单路/双路(±): 4 V ~ 36 V,±2 V ~ 18 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOICN
包装: 标准包装
产品目录页面: 1130 (CN2011-ZH PDF)
其它名称: MC33178DR2GOSDKR
MC33178, MC33179
http://onsemi.com
12
If a high source of resistance is used (R1 > 1.0 k
W), a
compensation capacitor equal to or greater than the input
capacitance of the op amp (10 pF) placed across the
feedback resistor (see Figure 35) can be used to neutralize
that pole and prevent outer loop oscillation. Since the closed
loop transient response will be a function of that
capacitance, it is important to choose the optimum value for
that capacitor. This can be determined by the following
Equation:
(1)
CC + (1 ) [R1 R2])2
CL (ZO R2)
where: ZO is the output impedance of the op amp.
For moderately high capacitive loads (500 pF < CL
< 1500 pF) the addition of a compensation resistor on the
order of 20
W between the output and the feedback loop will
help to decrease miller loop oscillation (see Figure 36). For
high capacitive loads (CL > 1500 pF), a combined
compensation scheme should be used (see Figure 37). Both
the compensation resistor and the compensation capacitor
affect the transient response and can be calculated for
optimum performance. The value of CC can be calculated
using Equation 1. The Equation to calculate RC is as follows:
(2)
RC + ZO
R1 R2
Figure 35. Compensation for
High Source Impedance
Figure 36. Compensation Circuit for
Moderate Capacitive Loads
Figure 37. Compensation Circuit for
High Capacitive Loads
R2
+
R1
ZL
CC
R2
RC
CL
R1
+
R2
CC
RC
CL
R1
+
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