参数资料
型号: MC33285
厂商: 飞思卡尔半导体(中国)有限公司
英文描述: Dual High Side TMOS Driver(双高端TMOS驱动器)
中文描述: 双高边坡的TMOS驱动器(双高端的TMOS驱动器)
文件页数: 4/5页
文件大小: 248K
代理商: MC33285
MC33285
4
MC33285
Freescale Semiconductor, Inc.
Introduction
The MC33285 contains only one charge pump for two
outputs.The outputs OUT1 and OUT2 are switched on and off
by the input IN .There are three ways to control the outputs:
OUt1 can be switched alone , they can be switched together
or OUT2 can be switched when OUT1 is already on .In the last
case , the voltage drop on OUT1 when charging OUT2 is
limited .
The external capacitor C
CP
connected to pin CP is used to
store the charge continuously delivered by the charge pump .
The voltage on this pin is limited to a maximum value V
CPmax
.
Both outputs are sourced with a constant current from C
CP
to
switch them on . In addition , the gates of the power FETs are
precharged from VCC to prevent C
CP
from being discharged
by a voltage on OUT1 or OUT2 which is still lower than
V
VCC
.The values of the output voltages are limited to
V
OUT1max
and V
OUT2max
The power FET on OUT1 is protected againts an
exceeded gate-source voltage by an internal zener diode.
Channel 1 allows to protect the n-channel power FET on
OUT1 under over current condition. The drain-source voltage
of the FET on OUT1 will be checked, if the channel 1 is
switched on. The internal error voltage threshold determines
the maximum drain-source voltage that allows the power FET
to stay in the on state. If the measured drain-source voltage
exceeds the internal error voltage threshold, the output of the
Over Current Protection Comparator (OCPC) is enabled. If
the output of the OCPC is active longer than t
OCdet
, the output
OUT1 is switched off .
After switching off the power FET on OUT1 by an over
current condition, the power FET can only be turned on again
by the input IN.
When switching off the power FETs their gate capacities
are discharged by a constant currennt I
OUToff
IF the input IN is disconnected, the MC33285 outputs
OUT1 and OUT2 are in the off state.
If overvoltage occurs on pin DRN for a time period longer
than t
LDdet
, then OUT2 is switched on for the time t
OUT2act
. In
overvoltage condition OUT1 is off if IN is below Vih.
Internal Zener Diode
An on-chip zener diode is placed between OUT1 and
SRC. Design guarantees that V
Z
> V
TH1
- zener clamping voltage between OUT1 and SRC :
V
TH1
< V
Z
< 20V
PWM capability
The CPIC2 is PWM capable on OUT2. The loss of charge
on Ccp when switching on OUT2 is refreshed until the start on
the next PWM cycle to a value which is sufficient to guarantee
the specified turn on behaviour.
The PWM capability is measured with a test circuit and
load conditions
- PWM cycle : period T = 20ms ; OUT2 is switched on from
10% to 90% of T .
- Test condition : V
IN
: ramps 2.5V to 5V according to PWM
cycle defined above.
Crosstalk between OUT1 and OUT2
If output OUT2 is switched on while OUT1 is already on,
the voltage drop that occurs on OUT1 is limited.
Voltage drop on OUT1 :
10V < V
VCC
< 20V : OUT1 not below V
VCC
+ 7V
7V < V
VCC
< 20V : OUT1 not below V
VCC
+ 7V
Each time OUT1 is switched on, a current ILCdet is
sourced out of pin SRC for the time tLCdet to check if there is
an external leakage current on that node in the application.
The high side switch on OUT1 is turned on only if the test is
successful."
F
For More Information On This Product,
Go to: www.freescale.com
n
.
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