参数资料
型号: MC33364DR2
厂商: ON Semiconductor
文件页数: 10/16页
文件大小: 0K
描述: IC CTRLR SMPS OTP UVLO 16SOIC
产品变化通告: LTB Notification 03/Jan/2008
标准包装: 1
系列: GreenLine™
输出隔离: 隔离
频率范围: 104kHz ~ 800kHz
输入电压: 8.5 V ~ 16 V
输出电压: 700V
工作温度: -25°C ~ 125°C
封装/外壳: 16-SOIC(0.154",3.90mm 宽)14 引线
供应商设备封装: 16-SOIC N
包装: 标准包装
其它名称: MC33364DR2OSDKR
MC33364
? Ippk ? ? fmin ?
Lp = = = 1.92 mH
(5 m sec)(0.118 A)
C1 = off in =
= 11.8 m F
ripple
N pA c
I out 2A
C5 = = = 286 m F
min
rip
B maxA c
L p ? B maxA c ?
Lp
?
?
n 2p
? ?
? 0.2 T ? ? 33.5 E--6 m 2 ?
= = 105 nH
? .00192 H ? ? 0.472 A ?
V cs 1.2 V
R7 = = = 2.54 Ω ≈ 2.2 Ω
ppk
? ?
?
?
Lp
AL
np = = = 139 turns
? Vs + Vfwd ? ? 1– ? max ? np
? ? max ? Vin(min) ? ?
2.5 V
= R11 = ref
lower
I
0.25 mA
V out ? V
ref
R upper = R10 =
div
= 14 k
6.0 V ? 2.5V
=
? 6.0 V + 0.3 V ? ? 1 ? 0.5 ? 139
? 0.5 ? 127 V ? ?
? ? max(Vin(min)) ?
= 19 turns
(16 V + 0.9 V)(1 ? 0.5)139
=
V out ? [V (TL431) + V
LED
ref
bias
S
I
= 420 Ω ≈ 430 Ω
6.0 V ? [2.5V + 1.4V]
=
The primary inductance value is given by:
? max V in(min) 0.5 ? 127 V ?
? 0.472 A ?? 70 kHz ?
The manufacturer recommends for that magnetic core a
maximum operating flux density of:
B max = 0.2 T
The cross--sectional area A c of the EF20 core is:
A c = 33.5 mm 2
The operating flux density is given by:
L pI ppk
B max =
From this equation the number of turns of the primary
winding can be derived:
L pI ppk
np =
The A L factor is determined by:
2
A L = =
2
L p I ppk
2
2
From the manufacturer‘s catalogue recommendation the
core with an A L of 100 nH is selected. The desired number
of turns of the primary winding is:
1 ∕ 2 1 ∕ 2
? 0.00192 H ?
? 100 nH ?
The number of turns needed by the 6.0 V secondary is
(assuming a Schottky rectifier is used):
ns =
= = 7 turns
The auxiliary winding to power the control IC is 16 V and
its number of turns is given by:
(V aux + V fwd )(1 ? ? max)n p
naux =
[0.5(127 V)]
The approximate value of rectifier capacitance needed is:
t (I )
V 50 V
where the minimum ripple frequency is 2 times the 50 Hz
line frequency and t off , the discharge time of C1 during the
haversine cycle, is assumed to be half the cycle period.
Because we have a variable frequency system, all the
calculations for the value of the output filter capacitors will
be done at the lowest frequency, since the ripple voltage will
be greatest at this frequency. When selecting the output
capacitor select a capacitor with low ESR to minimize ripple
from the current ripple. The approximate equation for the
output capacitance value is given by:
(f )(V ) (70 kHz)(0.1 V)
Determining the value of the current sense resistor (R7),
one uses the peak current in the predesign consideration.
Since within the IC there is a limitation of the voltage for the
current sensing, which is set to 1.2 V, the design of the
current sense resistor is simply given by:
I 0.472 A
The error amplifier function is provided by a TL431 on the
secondary, connected to the primary side via an optoisolator,
the MOC8102.
The voltage of the optoisolator collector node sets the
peak current flowing through the power switch during each
cycle. This pin will be connected to the feedback pin of the
MC33364, which will directly set the peak current.
Starting on the secondary side of the power supply, assign
the sense current through the voltage--sensing resistor
divider to be approximately 0.25 mA. One can immediately
calculate the value of the lower and upper resistor:
V (TL431)
R = = 10 k
div
(TL431)
I
0.25 mA
The value of the resistor that would provide the bias
current through the optoisolator and the TL431 is set by the
minimum operating current requirements of the TL431.
This current is minimum 1.0 mA. Assign the maximum
current through the branch to be 5 mA. That makes the bias
resistor value equal to:
]
R = R =
LED
5.0 mA
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