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| 型号： | MC33364DR2 |
| 厂商： | ON Semiconductor |
| 文件页数： | 8/16页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR SMPS OTP UVLO 16SOIC |
| 产品变化通告： | LTB Notification 03/Jan/2008 |
| 标准包装： | 1 |
| 系列： | GreenLine™ |
| 输出隔离： | 隔离 |
| 频率范围： | 104kHz ~ 800kHz |
| 输入电压： | 8.5 V ~ 16 V |
| 输出电压： | 700V |
| 工作温度： | -25°C ~ 125°C |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽）14 引线 |
| 供应商设备封装： | 16-SOIC N |
| 包装： | 标准包装 |
| 其它名称： | MC33364DR2OSDKR |
MC33364
f max =
Current Sense and Feedback Regulation
Current--mode control is implemented with the Current
Sense (CS) pin and Feedback (FB) pin. The FB pin is
internally pulled up with a 5 kOhm resistor from the 5 V
V ref . There is a resistor divider circuit and a 0.1 V offset in
this functional block. The following equation describes the
relation between the voltages of the FB and CS pins, V FB
and V CS respectively.
VCS(max) = VFB ∕ 4 ? 0.1 V
When the output is short circuited, there is no feedback
signal from the opto coupler and the FB pin is opened. It
gives V FB = 5 V and the maximum voltage of the CS pin is
1.15 V. When the voltage exceeds 1.15 V, the current sense
comparator turns on and terminates the MOSFET
conduction. It stops current flowing through the sense
resistor (R Sense ) and hence the sense resistor limits the
maximum MOSFET drain current by the following
equation.
Maximum Drain Current = 1.15 ∕ Rsense
When the output voltage is too high, the FB pin voltage is
pulled down by the opto coupler current and the duty ratio
is reduced. The output voltage is then regulated.
There is a Leading Edge Blanking (LEB) circuit with
250 ns propagation delay to prevent false triggering due to
parasitics in the CS pin. It makes a minimum on--time of the
MOSFET (t on(min) ).
Thermal Shutdown
There is a thermal shutdown block to prevent overheating
condition and protect the device from overheating. When
temperature is over 180 _ C, the Drive output and startup
Frequency Clamp Options
The drawback of critical conduction mode is variable
switching frequency. The switching frequency can increase
dramatically to hundreds of kHz when the output current is
too low or vanishes. It is a big problem when EMI above
150 kHz is concerned. Frequency Clamp (FC) is an optional
feature in the device to limit the upper switching frequency
to nominal 126 kHz by inserting a minimum off--time
(t off(min) ). When a minimum off--time is inserted, the
maximum frequency (f max ) limit is set.
1
ton(min) + toff(min)
The SMPS is forced to operate in DCM when the
maximum frequency is reached. The minimum off--time is
immediately counted after the driving signal goes low. If the
ZCD signal comes within this minimum off--time, the ZCD
information is ignored until the minimum off--time expires.
The next ZCD signal starts the MOSFET conduction.
There are three available FC options: MC33364D --
adjustable minimum off--time by external resistor,
MC33364D1 -- 6.9 us fixed minimum off--time, and
MC33364D2 -- no minimum off--time (FC disable).
The MC33364D has a FC pin, which can vary the
minimum off--time (or the maximum frequency) externally
in Figure 11. If the FC pin is opened, the minimum off--time
is fixed at 6.9 us. If the FC pin is grounded, the clamp is
disabled, and the SMPS will always operate in critical mode.
It is generally not recommended to sink or source more than
80 uA from the FC pin because high currents may cause
unstable operation.
circuit block are disable. The device resumes operation
when temperature falls below 130 _ C.
Gate Drive Output
The IC contains a CMOS output driver specifically
designed for direct drive of power MOSFET. The Drive
Output typical rise and fall times are 50 ns with a 1.0 nF
load. Unbalanced Source and Sink eliminates the need for an
external resistor between the device Drive output and the
Gate of the external MOSFET. Additional internal circuitry
has been added to keep the Drive Output in a sinking mode
whenever the UVLO is active. This characteristic eliminates
the need for an external gate pull--down resistor.
Vref
FC
Increase toff
FC
toff = 6.9us
FC
GND
Decrease toff
FC
GND
toff = 0us
(FC disable)
Figure 11. Frequency Clamp Setting
http://onsemi.com
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MC33364DR2G | 功能描述:电流型 PWM 控制器 Variable Frequency SMPS RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14 |
| MC33368D | 功能描述:功率因数校正 IC High Voltage PFC RoHS:否 制造商:Fairchild Semiconductor 开关频率:300 KHz 最大功率耗散: 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Reel |
| MC33368DG | 功能描述:功率因数校正 IC High Voltage PFC w/Critical Mode RoHS:否 制造商:Fairchild Semiconductor 开关频率:300 KHz 最大功率耗散: 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Reel |
| MC33368DG | 制造商:ON Semiconductor 功能描述:DC/DC Converter (DC-DC) / Switching Regu |
| MC33368DR2 | 功能描述:功率因数校正 IC High Voltage PFC RoHS:否 制造商:Fairchild Semiconductor 开关频率:300 KHz 最大功率耗散: 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Reel |
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