参数资料
型号: MC33385
厂商: 飞思卡尔半导体(中国)有限公司
英文描述: QUAD LOW SIDE DRIVER(四低端驱动器)
中文描述: 四路,低侧驱动器(四低端驱动器)
文件页数: 7/11页
文件大小: 369K
代理商: MC33385
MC33385
7
MC33385
Introduction
The device is a Quad Low Side Driver driven by four CMOS
input stages. Each output power transistor is protected against
short to V
BAT
and by a zener clamp against overvoltage.
A diagnostic logic recognizes four failure types at the
output stage : overcurrent, short to GND, open-load and
overtemperature.
The failures are individually stored in a byte which can be
read out via a serial interface (SPI).
Output Stage Control
Each of the four output stages is switched ON and OFF by
an individual control line (NON-Input). The logic level of the
control line is CMOS compatible. The output transistors are
switched off when the inputs are not connected.
Power Transistors
Each of the four output stages has its own zenerclamp.
This causes a voltage limitation at the power transistors when
inductive loads are switched off. Drain voltage ramp occurring
when output is switched on or off, is within defined limits.
Output transistors can be connected in parallel to increase
current capability. In this case, the associated inputs should
be connected together.
Short-Circuit and Overtemperature Protection
If the output current increases above the short current limit
for a time longer than t
SCB
or if the temperature increases
above T
OFF
then the power transistor is immediately switched
off. It remains switched off until the control signal on the NON-
Input is switched off and on again.
Diagnostics
Following failures at the output stage are recognized :
Short -Circuit to V
BAt
or overtemp...... = SCB (Highest priority)
Short -Circuit to GND............................. = SCG
Open Load................................................. = OL (Lowest priority)
The SCB failure is recognized by an overcurrent (current
above the short current limit) or an overtemperature.
If the current through the output stage is lower than the IOL-
reference, after a filter time an OL failure will be recognized.
This measurement is active while the powerstage is switched
on.
The SCG failure will recognize when the drain voltage is lower
than the OL reference limit, while the output stage is switched
off. All four outputs have an independent overtemperature
detection and shutdown. All failures are stored in individual
registers.
They can be read by the microprocessor via the serial
interface. There is no failure detected if the powerstage
control time is shorter than the filter time.
Diagnostic Interface
The communication between the microprocessor and the
failure register runs via the SPI link. If there is a failure stored
in the failure register, the first bit of the shift register is set to a
high level. With the H/L change on the NCS pin the first bit of
the diagnostic shift register will be transmitted to the SDO
output. The SDO output is the serial output from the
diagnostic shift register and it is tristated when the NCS pin is
high. The CLK pin clocks the diagnostic shift register. New
SDO data will appear on every rising edge of this pin and new
SDI data will be latched on every CLK’ s falling edge into the
shift register. With the first positive pulse of the CLK, the
failure register will be cleared. There is no bus collision at a
small spike at the NCS. The CLK is always LOW while the
NCS-signal is changing.
Reset
There are two different reset functions realised :
Under voltage reset : as long as the V
cc
voltage is lower than
V
CCRES
, the powerstages are switched off and the failure-
register are reseted.
Reset pin : as long as the NRES-pin is low, following circuits
are reseted :
Powerstages
Failure register
Undervoltage Protection
At low Vcc voltage, the device remains switched off even if
there is a voltage ramp at the OUT pin.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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