参数资料
型号: MC33926PNB
厂商: Freescale Semiconductor
文件页数: 3/25页
文件大小: 0K
描述: IC H-BRIDGE THROTTLE CTRL 32-QFN
标准包装: 260
类型: 半桥
输入类型: 非反相
输出数: 2
导通状态电阻: 120 毫欧
电流 - 峰值输出: 5A
电源电压: 5 V ~ 28 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 32-PowerQFN
供应商设备封装: 32-PQFN(8x8)
包装: 托盘
PIN CONNECTIONS
PIN CONNECTIONS
IN2
IN1
SLEW
1
2
3
32 31 30 29 28 27 26
25
24
23
NC
PGND
PGND
Transparent Top
VPWR
4
22
PGND
View of Package
AGND
VPWR
INV
FB
NC
5
6
7
8
9
AGND
10 11 12 13 14 15 16
21
20
19
18
17
SF
PGND
PGND
PGND
NC
Figure 3. 33926 Pin Connections
Table 1. 33926 Pin Definitions
A functional description of each pin can be found in the Functional Description section beginning on page 12 .
Pin
1
Pin Name
IN2
Pin
Function
Logic Input
Formal Name
Input 2
Definition
Logic input control of OUT2; e.g., when IN2 is logic HIGH, OUT2 is set to V PWR ,
and when IN2 is logic LOW, OUT2 is set to PGND. (Schmitt trigger input with
~ 80 μ A source so default condition = OUT2 HIGH.)
2
IN1
Logic Input
Input 1
Logic input control of OUT1; e.g., when IN1 is logic HIGH, OUT1 is set to V PWR ,
and when IN1 is logic LOW, OUT1 is set to PGND. (Schmitt trigger Input with
~ 80 μ A source so default condition = OUT1 HIGH.)
3
SLEW
Logic Input
Slew Rate
Logic input to select fast or slow slew rate. (Schmitt trigger input with ~ 80 μ A
sink so default condition = slow.)
4, 6, 11, 31
VPWR
Power Input
Positive Power
These pins must be connected together physically as close as possible and
Supply
directly soldered down to a wide, thick, low resistance supply plane on the PCB.
5,
Exposed
Pad
7
AGND
INV
Analog
Ground
Logic Input
Analog Signal
Ground
Input Invert
The low current analog signal ground must be connected to PGND via low
impedance path (<<10 m Ω , 0 Hz to 20 kHz). Exposed copper pad is also the
main heatsinking path for the device.
Sets IN1 and IN2 to logic LOW = TRUE. (Schmitt trigger input with ~ 80 μ A sink
so default condition = non-inverted.)
8
FB
Analog
Feedback
Load current feedback output provides ground referenced 0.24% of H-Bridge
Output
high-side output current. (Tie pin to GND through a resistor if not used.)
9, 17, 25
NC
No Connect
No internal connection is made to this pin.
10
EN
Logic Input
Enable Input
When EN is logic HIGH, the device is operational. When EN is logic LOW, the
device is placed in Sleep mode. (logic input with ~ 80 μ A sink so default
condition = Sleep mode.)
33926
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
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