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| 型号： | MC33926PNB |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 7/25页 |
| 文件大小： | 0K |
| 描述： | IC H-BRIDGE THROTTLE CTRL 32-QFN |
| 标准包装： | 260 |
| 类型： | 半桥 |
| 输入类型： | 非反相 |
| 输出数： | 2 |
| 导通状态电阻： | 120 毫欧 |
| 电流 - 峰值输出： | 5A |
| 电源电压： | 5 V ~ 28 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-PowerQFN |
| 供应商设备封装： | 32-PQFN（8x8） |
| 包装： | 托盘 |
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. Static Electrical Characteristics
Characteristics noted under conditions 5.0 V ≤ V PWR ≤ 28 V, - 40 ° C ≤ T A ≤ 125 ° C, GND = 0 V unless otherwise noted. Typical
values noted reflect the approximate parameter means at T A = 25°C under nominal conditions unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
POWER INPUTS (VPWR)
Operating Voltage Range (10)
V
Steady-state
Transient (t < 500 ms) (11)
Sleep State Supply Current
EN, D2 , INV, SLEW = Logic [0], IN1, IN2, D1 = Logic [1], and
I OUT = 0 A
Standby Supply Current (Part Enabled)
I OUT = 0 A, V EN = 5.0 V
V PWR(SS)
V PWR(t)
I PWR(SLEEP)
I PWR(STANDBY)
5.0
–
–
–
–
–
–
–
28
40
50
20
μ A
mA
Under-voltage Lockout Thresholds
V PWR(FALLING)
V PWR(RISING)
Hysteresis
V UVLO(ACTIVE)
V UVLO(INACTIVE)
V UVLO(HYS)
4.15
–
150
–
–
200
–
5.0
350
V
V
mV
CHARGE PUMP
Charge Pump Voltage (CP Capacitor = 33 n F)
V CP - V PWR
V
V PWR = 5.0 V
V PWR = 28 V
3.5
–
–
–
–
12
CONTROL INPUTS
Operating Input Voltage (EN, IN1, IN2, D1, D2, INV, SLEW)
V I
–
–
5.5
V
Input Voltage (IN1, IN2, D1, D2 , INV, SLEW)
Logic Threshold HIGH
Logic Threshold LOW
Hysteresis
Input Voltage (EN) Threshold
V IH
V IL
V HYS
V TH
2.0
–
250
1.0
–
–
400
–
–
1.0
–
2.0
V
V
mV
V
Logic Input Currents, VPWR = 5.0 V
I IN
μ A
Inputs EN, D2, INV, SLEW (internal pull-downs), V IH = 5.0 V
Inputs IN1, IN2, D1 (internal pull-ups), VIL = 0V
20
-200
80
-80
200
-20
Notes
10. Device specifications are characterized over the range of 8.0 V ≤ V PWR ≤ 28 V. Continuous operation above 28 V may degrade device
reliability. Device is operational down to 5.0 V, but below 8.0 V the output resistance may increase by 50 percent.
11. Device will survive the transient overvoltage indicated for a maximum duration of 500 ms. Transient not to be repeated more than once
every 10 seconds.
12. I PWR(SLEEP) is with Sleep mode activated and EN, D2 , INV, SLEW = logic [0], and IN1, IN2, D1 = logic [1] or with these inputs left floating.
13.
SLEW input voltage hysteresis is guaranteed by design.
33926
Analog Integrated Circuit Device Data
Freescale Semiconductor
7
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