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| 型号： | MC33972 |
| 厂商： | 飞思卡尔半导体(中国)有限公司 |
| 英文描述： | Multiple Switch Detection Interface with Suppressed Wake-Up(带抑制唤醒功能的多开关检测接口) |
| 中文描述： | 多交换检测接口，具有抑制唤醒（带抑制唤醒功能的多开关检测接口） |
| 文件页数： | 12/28页 |
| 文件大小： | 819K |
| 代理商： | MC33972 |
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33972/D
12
Go to: www.freescale.com
DEVICE OPERATION
Power Supply
The 33972 is designed to operate from 5.5 V to 40 V on the
V
PWR
pin. Characteristics are provided from 8.0 V to 16 V for
the device. Switch contact currents and the internal logic supply
are generated from the V
PWR
pin. The V
DD
supply pin is used to
set the SPI communication voltage levels, current source for the
SO driver, and pull-up current on
INT
and
CS
.
V
DD
supply may be removed from the device to reduce
quiescent current. If V
DD
is removed while the device is in
Normal mode, the device will remain in Normal mode. If V
DD
is
removed in Sleep mode, the device will remain in Sleep mode
until wake-up input is received (
WAKE
high to low, switch input
or interrupt timer expires).
Removing V
DD
from the device disables SPI communication
and will not allow the device to wake up from
INT
and
CS
pins.
Power-ON Reset (POR)
Applying V
PWR
to the device will cause a Power-ON Reset
and place the device in Normal mode.
Default settings from Power-ON Reset via V
PWR
or Reset
Command are as follows:
Programmable Switch – Set to Switch to Battery
All Inputs Set as Wake-Up
Wetting Current On (16 mA)
Wetting Current Timer On (20 ms)
All Inputs Tri-State
Analog Select 00000 (No Input Channel Selected)
Modes of Operation
The 33972 has two operating modes, Normal mode and
Sleep mode. A discussion on Normal mode begins below.
A discussion on Sleep mode begins on page 18.
Normal Mode
Normal mode may be entered by the following events:
Application of V
PWR
to the IC
Change-of-Switch State (when enabled)
Falling Edge of
WAKE
Falling Edge of
INT
(with V
DD
= 5.0 V and
WAKE
at
Logic [1])
Falling Edge of
CS
(with V
DD
= 5.0 V)
Interrupt Timer Expires
Only in Normal mode with V
DD
applied can the registers of the
33972 be programmed through the SPI.
The registers that may be programmed in Normal mode are
listed below. Further explanation of each register is provided in
subsequent paragraphs.
Programmable Switch Register
(
Settings Command
)
Wake-Up/Interrupt Register
(
Wake-Up/Interrupt
Command
)
Wetting Current Register
(
Metallic Command
)
Wetting Current Timer Register
(
Wetting Current Timer
Enable Command
)
Tri-State Register
(
Tri-State Command
)
Analog Select Register
(
Analog Command
)
Calibration of Timers
(
Calibration Command
)
Reset
(
Reset Command
)
Figure 4
, page 8, is a graphical description of the device
operation in Normal mode. Switch states are latched into the
input register on the falling edge of
CS
. The
INT
to the MCU is
cleared on the rising edge of CS. However,
INT
will not clear on
rising edge of
CS
if a switch has closed during SPI
communication (
CS
low). This prevents switch states from
being missed by the MCU.
Programmable Switch Register
Inputs SP0 to SP7 may be programmable for switch-to-
battery or switch-to-ground. These inputs types are defined
using the
settings command
(refer to
Table 1
). To set an SPn
input for switch-to-battery, a logic [1] for the appropriate bit must
be set. To set an SPn input for switch-to-ground, a logic [0] for
the appropriate bit must be set. The MCU may change or
update the Programmable Switch Register via software at any
time in Normal mode. Regardless of the setting, when the SPn
input switch is closed a logic [1] will be placed in the Serial
Output Response Register (refer to
Table 12
, page 17).
Table 1. Settings Command
Settings Command
Not used
Battery/Ground Select
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
1
X
X
X
X
X
X
X
X
sp7
sp6
sp5
sp4
sp3
sp2
sp1
sp0
F
Freescale Semiconductor, Inc.
For More Information On This Product,
n
.
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