参数资料
| 型号： | MC34717EPR2 |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 24/28页 |
| 文件大小： | 0K |
| 描述： | IC CONVERTER DDR 26QFN |
| 标准包装： | 2,500 |
| 应用： | 转换器，DDR |
| 输入电压： | 3 V ~ 6 V |
| 输出数： | 2 |
| 输出电压： | 0.7 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 26-VFQFN 裸露焊盘 |
| 供应商设备封装： | 26-QFN-EP（5x5） |
| 包装： | 带卷 (TR) |
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TYPICAL APPLICATIONS
LAYOUT GUIDELINES
The layout of any switching regulator requires careful
consideration. First, there are high di/dt signals present, and
the traces carrying these signals need to be kept as short and
as wide as possible to minimize the trace inductance, and
therefore reduce the voltage spikes they can create. To do
this, an understanding of the major current carrying loops is
important. See Figure 16 . These loops, and their associated
components, should be placed in such a way as to minimize
the loop size to prevent coupling to other parts of the circuit.
Also, the current carrying power traces and their associated
return traces should run adjacent to one another, to minimize
the amount of noise coupling. If sensitive traces must cross
the current carrying traces, they should be made
perpendicular to one another to reduce field interaction .
Second, small signal components which connect to
sensitive nodes need consideration. The critical small signal
components are the ones associated with the feedback
circuit. The high impedance input of the error amp is
especially sensitive to noise, and the feedback and
compensation components should be placed as far from the
switch node, and as close to the input of the error amplifier as
possible. Other critical small signal components include the
bypass capacitors for VIN, VREFIN, and VDDI. Locate the
bypass capacitors as close to the pin as possible.
The use of a multi-layer printed circuit board is
recommended. Dedicate one layer, usually the layer under
the top layer, as a ground plane. Make all critical component
ground connections with vias to this layer. Make sure that the
power grounds, PGND1 and PGND2 are connected directly
to the ground plane and not routed through the thermal pad
or analog ground. Dedicate another layer as a power plane
and split this plane into local areas for common voltage nets.
The IC input supply (VIN) should be connected with a
dedicated trace to the input supply. This will help prevent
noise on the buck regulator's power inputs (PVIN1 and
PVIN2) from injecting switching noise into the IC’s analog
circuitry.
In order to effectively transfer heat from the top layer to the
ground plane and other layers of the printed circuit board,
thermal vias need to be used in the thermal pad design. It is
recommended that 5 to 9 vias be spaced evenly and have a
finished diameter of 0.3 mm.
VIN1
VIN2 3
PVIN1 and 2
HS
SW1
SD
Loop Curr ent
HS ON
Loop
Current
SD ON
HS
SW2 3
SW1 and 2
LS
Loop Curr ent
HS ON
Loop
Current
LS ON
GND2
PGND1 and 2 3
BUCK
CONVERTER 1
Buck Converter 1 and
BUCK CONVERTER 2
2 and 3
Figure 16. Current Loop
34717
Analog Integrated Circuit Device Data
24
Freescale Semiconductor
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