参数资料
型号: MC34848EPR2
厂商: Freescale Semiconductor
文件页数: 16/38页
文件大小: 0K
描述: IC LED DVR BACKLIGHT 8CH 48QFN
产品变化通告: AMPD Product Discontinuation 12/Dec/2012
标准包装: 2,000
恒定电流:
恒定电压:
拓扑: PWM,升压(升压)
输出数: 8
内部驱动器:
类型 - 主要: 背光
频率: 200kHz ~ 1.2MHz
电源电压: 2.6 V ~ 3.6 V
输出电压: 45V
安装类型: 表面贴装
封装/外壳: 48-VFQFN 裸露焊盘
供应商设备封装: 48-QFN-EP(7x7)
包装: 带卷 (TR)
工作温度: -40°C ~ 85°C
FUNCTIONAL DESCRIPTION
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
INTERNAL POWER SUPPLY
The internal circuitry of the 34848 uses two separate
power supplies. The first is a high voltage input at PVCC that
can range from 6.0 to 14 V, and is used to power the LED
drivers and gate drive for the boost controller. The external
Boost low side FET gate drive is equal to the input voltage at
VDC. The second supply is DVDD, which ranges from 2.6 to
3.6 V, and is used to power the internal logic circuits.
Internally there are two regulators, which both have
external decoupling capacitors. VDC is used to regulate the
PVCC input to produce a constant drive voltage for the
internal LED drivers, and is decoupled on the VDC pin.
VLOGIC is used to produce 2.5 V for internal logic from the
DVDD supply and is decoupled using a capacitor on the
VLOGIC pin.
If the input voltage at either supply falls below their
respective UVLO threshold, the device automatically enters
the power down mode. Likewise, operation of the device is
only possible when the two input voltages are above the
UVLO threshold levels.
In addition to the above, PVCC voltage is also monitored
for UVLO.
The SHUT_B pin can be used to enable/disable the Boost
Controller and LED drivers.
DIFFERENTIAL INTERFACE AND CONTROL
LOGIC
The 34848 uses a differential interface. The clock rate
supported is up to 85 MHz. In addition, 6 logic pins are also
used as part of the interface.
Figure 12. Control Interface
When SETUP is taken high the interface programs data
registers which are in setting mode. An integrated 10-bit shift
register selects which bit is being written. After the pulsing
data in from the differential interface. An internal counter
(SIC) selects which channel is being written. The 10-bit shift
register in multiple devices are connected to generate a long
from SETUP and RESET_SCAN, the STH triggers the PWM
34848
Analog Integrated Circuit Device Data
16
Freescale Semiconductor
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