参数资料
型号: MC56F8025VLD
厂商: Freescale Semiconductor
文件页数: 141/161页
文件大小: 0K
描述: IC DSP 16BIT DUAL HARV 44-LQFP
标准包装: 800
系列: 56F8xxx
核心处理器: 56800E
芯体尺寸: 16-位
速度: 32MHz
连通性: I²C,LIN,SCI,SPI
外围设备: POR,PWM,WDT
输入/输出数: 35
程序存储器容量: 32KB(16K x 16)
程序存储器类型: 闪存
RAM 容量: 2K x 16
电压 - 电源 (Vcc/Vdd): 3 V ~ 3.6 V
数据转换器: A/D 8x12b,D/A 2x12b
振荡器型: 内部
工作温度: -40°C ~ 105°C
封装/外壳: 44-LQFP
包装: 托盘
56F8035/56F8025 Data Sheet, Rev. 6
80
Freescale Semiconductor
6.2 Features
The SIM has the following features:
Chip reset sequencing
Core and peripheral clock control and distribution
Stop/Wait mode control
System status control
Registers containing the JTAG ID of the chip
Controls for programmable peripheral and GPIO connections
Peripheral clocks for TMR and PWM with a high-speed (3X) option
Power-saving clock gating for peripherals
Three power modes (Run, Wait, Stop) to control power utilization
— Stop mode shuts down the 56800E core, system clock, and peripheral clock
— Wait mode shuts down the 56800E core and unnecessary system clock operation
— Run mode supports full device operation
Controls the enable/disable functions of the 56800E core WAIT and STOP instructions with write protection
capability
Controls the enable/disable functions of Large Regulator Standby mode with write protection capability
Permits selected peripherals to run in Stop mode to generate Stop recovery interrupts
Controls for programmable peripheral and GPIO connections
Software chip reset
I/O short address base location control
Peripheral protection control to provide runaway code protection for safety-critical applications
Controls output of internal clock sources to CLKO pin
Four general-purpose software control registers are reset only at power-on
Peripherals Stop mode clocking control
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