参数资料
型号: MC56F8156VFVE
厂商: Freescale Semiconductor
文件页数: 117/178页
文件大小: 0K
描述: IC DSP 16BIT 40MHZ 144-LQFP
标准包装: 60
系列: 56F8xxx
核心处理器: 56800E
芯体尺寸: 16-位
速度: 40MHz
连通性: EBI/EMI,SCI,SPI
外围设备: POR,PWM,WDT
输入/输出数: 62
程序存储器容量: 256KB(128K x 16)
程序存储器类型: 闪存
RAM 容量: 8K x 16
电压 - 电源 (Vcc/Vdd): 2.25 V ~ 3.6 V
数据转换器: A/D 16x12b
振荡器型: 外部
工作温度: -40°C ~ 105°C
封装/外壳: 144-LQFP
包装: 托盘
Interrupt Vector Table
56F8356 Technical Data, Rev. 13
Freescale Semiconductor
43
Preliminary
accessed using a 16-bit 56800-compatible address bus. To address this situation, the EMI_MODE pin can
be used to configure four GPIO pins as Address[19:16] upon reset (only one of these pins [A16] is usable
in the 56F8356/56F8156).
The EMI_MODE pin also affects the reset vector address, as provided in Table 4-4. Additional pins must
be configured as address or chip select signals to access addresses at P:$10 0000 and above.
Note: Program RAM is NOT available on the 56F8156 device.
4.3 Interrupt Vector Table
Table 4-5 provides the reset and interrupt priority structure, including on-chip peripherals. The table is
Table 4-4 Program Memory Map at Reset
Begin/End
Address
Mode 0 (MA = 0)
Mode 11 (MA = 1)
1. If Flash Security Mode is enabled, EXTBOOT Mode 1 cannot be used. See Security Features, Part 7.
Internal Boot
External Boot
Internal Boot
16-Bit External Address Bus
EMI_MODE = 02,3
16-Bit External Address Bus
2. This mode provides maximum compatibility with 56F80x parts while operating externally.
3. “EMI_MODE =0” when EMI_MODE pin is tied to ground at boot up.
EMI_MODE = 14
20-Bit External Address Bus
4. “EMI_MODE =1” when EMI_MODE pin is tied to VDD at boot up.
P:$1F FFFF
P:$10 0000
External Program Memory5
5. Not accessible in reset configuration, since the address is above P:$00 FFFF. The higher bit address/GPIO (and/or chip
selects) pins must be reconfigured before this external memory is accessible.
External Program Memory5
P:$0F FFFF
P:$03 0000
External Program RAM
COP Reset Address = 02 00026
Boot Location = 02 00006
6. Booting from this external address allows prototyping of the internal Boot Flash.
P:$02 FFFF
P:$02 F800
On-Chip Program RAM
4KB
P:$02 F7FF
P:$02 2000
Reserved
116KB
P:$02 1FFF
P:$02 0000
Boot Flash
16KB
COP Reset Address = 02 0002
Boot Location = 02 0000
Boot Flash
16KB
(Not Used for Boot in this Mode)
P:$01 FFFF
P:$01 0000
Internal Program Flash7
128KB
7. Two independent program flash blocks allow one to be programmed/erased while executing from another. Each block
must have its own mass erase.
Internal Program Flash
128KB
P:$00 FFFF
P:$00 0000
Internal Program Flash7
128KB
External Program RAM
COP Reset Address = 00 0002
Boot Location = 00 0000
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