参数资料
型号: MC56F8256VLF
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 16-BIT, FLASH, 60 MHz, MICROCONTROLLER, PQFP48
封装: 7 X 7 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, PLASTIC, MS-026BBC, LQFP-48
文件页数: 19/88页
文件大小: 4050K
代理商: MC56F8256VLF
MC56F825x/MC56F824x Digital Signal Controller, Rev. 3
Signal/Connection Descriptions
Freescale Semiconductor
26
GPIOC14
(SDA0)
(XB_OUT0)
37
41
55
Input/
Output
Input/
Open-drain
Output
Input
Input,
internal
pullup
enabled
Port C GPIO — This GPIO pin can be individually programmed as
an input or output pin.
SDA0 — I2C0 serial data line
XB_OUT0 — Crossbar module output 0
After reset, the default state is GPIOC14.
GPIOC15
(SCL0)
(XB_OUT1)
38
42
56
Input/
Output
Input/
Open-drain
Output
Input
Input,
internal
pullup
enabled
Port C GPIO — This GPIO pin can be individually programmed as
an input or output pin.
SCL0 — I2C0 serial clock
XB_OUT1 — Crossbar module output 1
After reset, the default state is GPIOC15.
GPIOE0
PWM0B
30
33
45
Input/
Output
Input
Input,
internal
pullup
enabled
Port E GPIO — This GPIO pin can be individually programmed as
an input or output pin.
PWM0B — NanoEdge PWM submodule 0 output B
After reset, the default state is GPIOE0.
GPIOE1
(PWM0A)
31
34
46
Input/
Output
Input,
internal
pullup
enabled
Port E GPIO — This GPIO pin can be individually programmed as
an input or output pin.
PWM0A — NanoEdge PWM submodule 0 output B
After reset, the default state is GPIOE1.
GPIOE2
(PWM1B)
32
35
47
Input/
Output
Input,
internal
pullup
enabled
Port E GPIO — This GPIO pin can be individually programmed as
an input or output pin.
PWM1B — NanoEdge PWM submodule 1 output A
After reset, the default state is GPIOE2.
GPIOE3
(PWM1A)
33
36
48
Input/
Output
Input,
internal
pullup
enabled
Port E GPIO — This GPIO pin can be individually programmed as
an input or output pin.
PWM1A — NanoEdge PWM submodule 1 output A
After reset, the default state is GPIOE3.
Table 5. MC56F825x/MC56F824x Signal and Package Information (continued)
Signal
Name
44
LQFP
48
LQFP
64
LQFP
Type
State
During
Reset
Signal Description
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