参数资料
型号: MC56F8322MFAER2
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 数字信号处理
英文描述: 0-BIT, 120 MHz, OTHER DSP, PQFP48
封装: ROHS COMPLIANT, LQFP-48
文件页数: 96/136页
文件大小: 719K
代理商: MC56F8322MFAER2
56F8322 Techncial Data, Rev. 16
62
Freescale Semiconductor
Preliminary
5.6.3.5
Low Voltage Detector Interrupt Priority Level (LVI IPL)—Bits 7–6
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
It is disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
5.6.3.6
Reserved—Bits 5–2
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
5.6.3.7
External IRQ A Interrupt Priority Level (IRQA IPL)—Bits 1–0
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
It is disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
5.6.4
Interrupt Priority Register 3 (IPR3)
Figure 5-6 Interrupt Priority Register 3 (IPR3)
5.6.4.1
Reserved—Bits 15–10
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
5.6.4.2
FlexCAN Message Buffer Interrupt Priority Level
(FCMSGBUF IPL)—Bits 9–8
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
Base + $3
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
0
FCMSGBUF IPL
FCWKUP IPL
FCERR IPL
FCBOFF IPL
0
Write
RESET
00
0
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