- 您现在的位置：买卖IC网 > PDF目录80565 > MC68331CFC16B1 (FREESCALE SEMICONDUCTOR INC) 32-BIT, 16 MHz, MICROCONTROLLER, PQFP132 PDF资料下载
参数资料
| 型号： | MC68331CFC16B1 |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 16 MHz, MICROCONTROLLER, PQFP132 |
| 封装： | 0.950 X 0.950 INCH, 0.025 INCH PITCH, PLASTIC, QFP-132 |
| 文件页数： | 58/90页 |
| 文件大小： | 481K |
| 代理商： | MC68331CFC16B1 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页当前第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页
MC68331
MOTOROLA
MC68331TS/D
61
SPCR2 contains QSPI configuration parameters. The CPU can read and write this register; the QSM
has read access only. Writes to SPCR2 are buffered. A write to SPCR2 that changes a bit value while
the QSPI is operating is ineffective on the current serial transfer, but becomes effective on the next se-
rial transfer. Reads of SPCR2 return the current value of the register, not of the buffer.
SPIFIE — SPI Finished Interrupt Enable
0 = QSPI interrupts disabled
1 = QSPI interrupts enabled
SPIFIE enables the QSPI to generate a CPU interrupt upon assertion of the status flag SPIF.
WREN — Wrap Enable
0 = Wraparound mode disabled
1 = Wraparound mode enabled
WREN enables or disables wraparound mode.
WRTO — Wrap To
When wraparound mode is enabled, after the end of queue has been reached, WRTO determines
which address the QSPI executes.
Bit 12 — Not Implemented
ENDQP — Ending Queue Pointer
This field contains the last QSPI queue address.
Bits [7:4] — Not Implemented
NEWQP — New Queue Pointer Value
This field contains the first QSPI queue address.
SPCR3 contains QSPI configuration parameters. The CPU can read and write SPCR3, but the QSM
has read-only access.
Bits [15:11] — Not Implemented
LOOPQ — QSPI Loop Mode
0 = Feedback path disabled
1 = Feedback path enabled
LOOPQ controls feedback on the data serializer for testing.
HMIE — HALTA and MODF Interrupt Enable
0 = HALTA and MODF interrupts disabled
1 = HALTA and MODF interrupts enabled
HMIE controls CPU interrupts caused by the HALTA status flag or the MODF status flag in SPSR.
SPCR2 — QSPI Control Register 2
$YFFC1C
15
14
13
12
11
8
7
6
5
4
3
0
SPIFIE
WREN
WRTO
0
ENDQP
0
NEWQP
RESET:
0
SPCR3 — QSPI Control Register 3
$YFFC1E
15
14
13
12
11
10
9
8
7
0
LOOPQ
HMIE
HALT
SPSR
RESET:
0
相关PDF资料 |
PDF描述 |
|---|---|
| MC68882CRC16A | 32-BIT, MATH COPROCESSOR, CPGA68 |
| MC68HC11E1VFN3 | 8-BIT, 3 MHz, MICROCONTROLLER, PQCC52 |
| MC68HC16Z1CFC25 | 16-BIT, 25.17 MHz, MICROCONTROLLER, PQFP132 |
| MC68HC705X32CFU4 | 8-BIT, OTPROM, 4 MHz, MICROCONTROLLER, PQFP64 |
| MC68HC711P2CFN4 | 8-BIT, OTPROM, 4 MHz, MICROCONTROLLER, PQCC84 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MC68331CFC20 | 制造商:Freescale Semiconductor 功能描述: |
| MC68331CFC20B1 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Freescale Semiconductor 功能描述: |
| MC68331CFC25 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Freescale Semiconductor 功能描述: |
| MC68331CFC25B1 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Freescale Semiconductor 功能描述: |
| MC68331CFV16 | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:User’s Manual |
发布紧急采购，3分钟左右您将得到回复。