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参数资料
| 型号： | MC68EC000CAA20 |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 6/26页 |
| 文件大小： | 0K |
| 描述： | IC MPU 32BIT 20MHZ 64-QFP |
| 标准包装： | 84 |
| 系列： | M680x0 |
| 处理器类型： | M680x0 32-位 |
| 速度： | 20MHz |
| 电压： | 3.3V，5V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-QFP |
| 供应商设备封装： | 64-QFP（14x14） |
| 包装： | 托盘 |
14
M68000 USER’S MANUAL ADDENDUM
MOTOROLA
Figure 9. MC68SEC000 Read Cycle Timing Diagram
6A
8
6
13
14
12
17
18
47
28
29
27
48
47
30
47
32
56
47
32
S0
S1
S2
S3
S4
S5
S6
CLK
FC2–FC0
A23–A0
AS
LDS / UDS
R/W
DTACK
DATA IN
BERR / BR
(NOTE 2)
HALT / RESET
47
ASYNCHRONOUS
INPUTS
(NOTE 1)
S7
31
7
11
11A
NOTES:
1. Setup time for the asynchronous inputs IPL2–IPL0 and AVEC (#47) guarantees their recognition at the
next falling edge of the clock.
2. BR need fall at this time only to insure being recognized at the end of the bus cycle.
3. Timing measurements are referenced to and from a low voltage of 0.8 V and a high voltage of 2.0 V,
unless otherwise noted. The voltage swing through this range should start outside and pass through the
range such that the rise or fall is linear between 0.8 V and 2.0 V.
9
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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