- 您现在的位置：买卖IC网 > PDF目录45215 > MC68EC030CFE25C (MOTOROLA INC) 32-BIT, 25 MHz, MICROPROCESSOR, CQCC132 PDF资料下载
参数资料
| 型号： | MC68EC030CFE25C |
| 厂商： | MOTOROLA INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 25 MHz, MICROPROCESSOR, CQCC132 |
| 封装： | CERQUAD-132 |
| 文件页数： | 46/48页 |
| 文件大小： | 332K |
| 代理商： | MC68EC030CFE25C |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页当前第46页第47页第48页
MOTOROLA
MC68EC030 TECHNICAL DATA
7
All microprocessors of the M68000 Family support instruction tracing (via the T0 status bit in the
MC68EC030) where each instruction executed is followed by a trap to a user-defined trace routine. The
MC68EC030, like the MC68030 and MC68040, also has the capability to trace only on change-of-flow
instructions (branch, jump, subroutine call and return, etc.) using the T1 status bit. These features are
important for software program development and debug.
The vector base register (VBR) is used to determine the run-time location of the exception vector table in
memory; thus, each separate vector table for each process or task can properly manage exceptions
independent of each other.
The M68000 Family processors distinguish address spaces as supervisor/user, program/data, and CPU
space. These five combinations are specified by the function code pins (FC0/FC1/FC2) during bus
cycles, indicating the particular address space. Using the function codes, the memory subsystem
(hardware) can distinguish between supervisor accesses and user accesses as well as program accesses,
data accesses, and CPU space accesses. To support the full privileges of the supervisor, the alternate
function code registers allow the supervisor to specify the function code for an access by appropriately
preloading the SFC/DFC registers.
The cache registers allow supervisor software manipulation of the on-chip instruction and data caches.
Control and status accesses to the caches are provided by the cache control register (CACR); the cache
address register (CAAR) specifies the address for those cache control functions that require an address.
The access control registers are accessible by the supervisor only. The access control registers are used
to define two memory spaces with caching restrictions. The ACU status register (ACUSR) is used to show
the result of PTEST operations on the ACU.
DATA TYPES AND ADDRESSING MODES
Seven basic data types are supported by the MC68EC030:
Bits
Bit Fields (String of consecutive bits, 1–32 bits long)
BCD Digits (Packed: 2 digits/byte, Unpacked: 1 digit/byte)
Byte Integers (8 bits)
Word Integers (16 bits)
Long-Word Integers (32 bits)
Quad-Word Integers (64 bits)
相关PDF资料 |
PDF描述 |
|---|---|
| MC68EC030RP40 | 32-BIT, 40 MHz, MICROPROCESSOR, PPGA124 |
| MC68EC060RC75 | 32-BIT, 75 MHz, MICROPROCESSOR, CPGA206 |
| MC68EC060RC66 | 32-BIT, 66.67 MHz, MICROPROCESSOR, CPGA206 |
| MC68LC060RC75 | 32-BIT, 75 MHz, MICROPROCESSOR, CPGA206 |
| MC68EN302CPV20BT | 4 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP144 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MC68EC030FE25B | 制造商:Motorola Inc 功能描述: |
| MC68EC030FE25C | 功能描述:微处理器 - MPU 32B ON-CHIP CACHE RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| MC68EC030FE25CB1 | 功能描述:IC MPU 32BIT ENH 25MHZ 132-CQFP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - 微处理器 系列:M680x0 标准包装:1 系列:MPC85xx 处理器类型:32-位 MPC85xx PowerQUICC III 特点:- 速度:1.2GHz 电压:1.1V 安装类型:表面贴装 封装/外壳:783-BBGA，FCBGA 供应商设备封装:783-FCPBGA（29x29） 包装:托盘 |
| MC68EC030FE40B | 制造商:Motorola Inc 功能描述: |
| MC68EC030FE40C | 功能描述:微处理器 - MPU 32B ON-CHIP CACHE RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
发布紧急采购，3分钟左右您将得到回复。