Serial Management Controllers (SMCs)
MC68360 USER’S MANUAL
and contains five 8-bit characters. Write $B000 to Tx_BD_Status. Write $0005 to
Tx_BD_Length. Write $00002000 to Tx_BD_Pointer.
14. Write $FF to the SMCE to clear any previous events.
15. Write $17 to the SMCM to enable all possible SMC interrupts.
16. Write $00000010 to the CIMR to allow SMC1 to generate a system interrupt. (The
CICR should also be initialized.)
17. Write $4820 to SMCMR to configure normal operation (not loopback), 8-bit
characters, no parity, 1 stop bit. Notice that the transmitter and receiver have
not been enabled yet.
18. Write $4823 to SMCMR to enable the SMC transmitter and receiver. This
additional write ensures that the TEN and REN bits will be enabled last.
NOTE
After 5 bytes have been transmitted, the Tx BD is closed. Addi-
tionally, the receive buffer is closed after 16 bytes have been re-
ceived. Any additional receive data beyond 16 bytes will cause
a busy (out-of-buffers) condition since only one Rx BD was pre-
pared.
7.11.9 SMC Interrupt Handling
The following list describes what would normally occur within an interrupt handler for the
SMC:
1. Once an interrupt occurs, read the SMCE to see which sources have caused inter-
rupts. The SMCE bits would normally be cleared at this time.
2. Process the Tx BD to reuse it if the TX bit was set in SMCE. Extract data from the Rx
BD if the RX bit was set in SMCE. To transmit another buffer, simply set the Tx BD R-
bit.
3. Clear the SMC1 bit in the CISR.
4. Execute the RTE instruction.
7.11.10 SMC as a Transparent Controller
The following paragraphs describe using the SMC as a transparent controller.
7.11.10.1 SMC TRANSPARENT CONTROLLER KEY FEATURES. The SMC transparent
controller contains the following key features:
Flexible Data Buffers
May Be Used To Connect to a TDM Bus using the TSA in the SI
May Transmit and Receive Transparently on Its Own Set of Pins using a Sync Pin To
Synchronize the Beginning of Transmission and Reception to an External Event
Programmable Character Length (4–16)
Reverse Data Mode
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Freescale Semiconductor, Inc.
For More Information On This Product,
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