参数资料
型号: MC68HC05E1MP
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP28
封装: PLASTIC, DIP-28
文件页数: 17/86页
文件大小: 709K
代理商: MC68HC05E1MP
General Release Specication
MC68HC05E1 — Revision 2.0
24
Operating Modes
MOTOROLA
Operating Modes
Self-check results (using the LEDs as monitors) are shown in Table 2-2.
The Self-Check program resides at ROM location $1F00 to $1FEF. The
following subroutines are available to user programs and do not require
any external hardware.
2.4.1 Timer Test Subroutine
This subroutine returns with the Z bit cleared if any error is detected;
otherwise, the Z bit is set.
This subroutine is called at location $1F9B. Because the timer is free
running and has only a divide-by-four prescaler, each timer count cannot
be tested. The test sets RTIE and CPIE and reads the timer once every
3 counts (12 cycles) to check for correct counting. The test tracks the
counter until the timer wraps around, setting the TOF bit in the Timer
Control and Status register. The routine then waits for RTIF=1 and CPIF
= 1 before returning with the RTI and the CPI pending. RAM location
$0095 is overwritten. Upon return to the user’s program, A=0 if the test
passed.
2.4.2 ROM Checksum Subroutine
This subroutine returns with the Z bit cleared if any error is detected;
otherwise, the Z bit is set.
This subroutine is called at location $1FD1. A short routine is set up and
executed in RAM to compute a checksum of the entire ROM pattern. The
checksum byte is computed by Motorola and is located in the Self-Check
ROM. Upon return to the user’s program, X=0. If the test passed, A=0.
RAM locations $0090 through $0093 are overwritten.
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For More Information On This Product,
Go to: www.freescale.com
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