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| 型号： | MC68HC08GP8AMFB |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 8.2 MHz, MICROCONTROLLER, PQFP44 |
| 封装： | PLASTIC, QFP-44 |
| 文件页数： | 125/126页 |
| 文件大小： | 4243K |
| 代理商： | MC68HC08GP8AMFB |
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Keyboard Interrupt (KBI) Module
Data Sheet
MC68HC08GP8A
98
Keyboard Interrupt (KBI) Module
MOTOROLA
8.6 Keyboard Module During Break Interrupts
The system integration module (SIM) controls whether the keyboard interrupt latch
can be cleared during the break state. The BCFE bit in the SIM break flag control
register (SBFCR) enables software to clear status bits during the break state.
To allow software to clear the keyboard interrupt latch during a break interrupt,
write a logic 1 to the BCFE bit. If a latch is cleared during the break state, it remains
cleared when the MCU exits the break state.
To protect the latch during the break state, write a logic 0 to the BCFE bit. With
BCFE at logic 0 (its default state), writing to the keyboard acknowledge bit (ACKK)
in the keyboard status and control register during the break state has no effect. See
8.7 I/O Registers
These registers control and monitor operation of the keyboard module:
Keyboard status and control register (INTKBSCR)
Keyboard interrupt enable register (INTKBIER)
8.7.1 Keyboard Status and Control Register
The keyboard status and control register:
Flags keyboard interrupt requests
Acknowledges keyboard interrupt requests
Masks keyboard interrupt requests
Controls keyboard interrupt triggering sensitivity
Bits 7–4 — Not used
These read-only bits always read as logic 0s.
KEYF — Keyboard Flag Bit
This read-only bit is set when a keyboard interrupt is pending. Reset clears the
KEYF bit.
1 = Keyboard interrupt pending
0 = No keyboard interrupt pending
Address: $001A
Bit 7
654321
Bit 0
Read:
0000
KEYF
0
IMASKK
MODEK
Write:
ACKK
Reset:
00000000
= Unimplemented
Figure 8-4. Keyboard Status and Control Register (INTKBSCR)
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For More Information On This Product,
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