- 您现在的位置：买卖IC网 > PDF目录69027 > MC68HC11D0CP2 (FREESCALE SEMICONDUCTOR INC) 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PDIP40 PDF资料下载
参数资料
| 型号： | MC68HC11D0CP2 |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PDIP40 |
| 封装： | PLASTIC, DIP-40 |
| 文件页数： | 44/124页 |
| 文件大小： | 1481K |
| 代理商： | MC68HC11D0CP2 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页当前第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页第122页第123页第124页
MOTOROLA
CENTRAL PROCESSING UNIT
MC68HC11D3
3-6
TECHNICAL DATA
terrupt occurred. The X interrupt mask bit is set only by hardware (or acknowledge). X
is cleared only by program instruction (TAP, where the associated bit of A is 0; or RTI,
where bit 6 of the value loaded into the CCR from the stack has been cleared). There
is no hardware action for clearing X.
3.1.6.8 Stop Disable (S)
Setting the STOP disable (S) bit prevents the STOP instruction from putting the
M68HC11 into a low-power stop condition. If the STOP instruction is encountered by
the CPU while the S bit is set, it is treated as a no-operation (NOP) instruction, and
processing continues to the next instruction. S is set by reset —STOP disabled by de-
fault.
3.2 Data Types
The M68HC11 CPU supports the following data types:
Bit data
8-bit and 16-bit signed and unsigned integers
16-bit unsigned fractions
16-bit addresses
A byte is eight bits wide and can be accessed at any byte location. A word is composed
of two consecutive bytes with the most significant byte at the lower value address. Be-
cause the M68HC11 is an 8-bit CPU, there are no special requirements for alignment
of instructions or operands.
3.3 Opcodes and Operands
The M68HC11 family of microcontrollers uses 8-bit opcodes. Each opcode identifies
a particular instruction and associated addressing mode to the CPU. Several opcodes
are required to provide each instruction with a range of addressing capabilities. Only
256 opcodes would be available if the range of values were restricted to the number
able to be expressed in 8-bit binary numbers.
A four-page opcode map has been implemented to expand the number of instructions.
An additional byte, called a prebyte, directs the processor from page 0 of the opcode
map to one of the other three pages. As its name implies, the additional byte precedes
the opcode.
A complete instruction consists of a prebyte, if any, an opcode, and zero, one, two, or
three operands. The operands contain information the CPU needs for executing the
instruction. Complete instructions can be from one to five bytes long.
3.4 Addressing Modes
Six addressing modes; immediate, direct, extended, indexed, inherent, and relative,
detailed in the following paragraphs, can be used to access memory. All modes except
inherent mode use an effective address. The effective address is the memory address
from which the argument is fetched or stored, or the address from which execution is
相关PDF资料 |
PDF描述 |
|---|---|
| MC68HC11D0CP | 8-BIT, MICROCONTROLLER, PDIP40 |
| MC68HC11L6CFU1 | 8-BIT, OTPROM, 1 MHz, MICROCONTROLLER, PQFP64 |
| MC68HC16S2CPU25 | 16-BIT, 25.17 MHz, MICROCONTROLLER, PQFP100 |
| MC16S2CPU20B1 | 16-BIT, 20.97 MHz, MICROCONTROLLER, PQFP100 |
| MC68HC16X1CTH | 16-BIT, MROM, 16.78 MHz, MICROCONTROLLER, PQFP120 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MC68HC11D0CP3 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:8-Bit Microcontroller |
| MC68HC11D0FB | 制造商:未知厂家 制造商全称:未知厂家 功能描述:8-Bit Microcontroller |
| MC68HC11D0FN | 制造商:未知厂家 制造商全称:未知厂家 功能描述:8-Bit Microcontroller |
| MC68HC11D0FNR2 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:8-Bit Microcontroller |
| MC68HC11D0P | 制造商:未知厂家 制造商全称:未知厂家 功能描述:8-Bit Microcontroller |
发布紧急采购，3分钟左右您将得到回复。