参数资料
型号: MC68HC705SR3CPE
厂商: Freescale Semiconductor
文件页数: 50/96页
文件大小: 0K
描述: IC MCU 3.75K 2.1MHZ OTP 40-DIP
标准包装: 9
系列: HC05
核心处理器: HC05
芯体尺寸: 8-位
速度: 4MHz
外围设备: LED,POR
输入/输出数: 32
程序存储器容量: 3.75KB(3.75K x 8)
程序存储器类型: OTP
RAM 容量: 192 x 8
电压 - 电源 (Vcc/Vdd): 3 V ~ 5.5 V
数据转换器: A/D 4x8b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 40-DIP(0.600",15.24mm)
包装: 管件
Freescale
7-4
MC68HC05SR3
ANALOG TO DIGITAL CONVERTER
7
Using a port D pin as both an analog and digital input simultaneously is prohibited. When the ADC
is enabled (ADON=1) and one of channels 0 to 5 is selected, the corresponding Port D pin will
appear as a logic zero when read from the Port Data Register.
7.3
ADC Data Register (ADDR)
The ADDR stores the result of a valid ADC conversion when the COCO bits is set in ADSCR.
7.4
ADC during Low Power Modes
The ADC continues normal operation in WAIT mode. To reduce power consumption in WAIT
mode, the ADON and ADRC bits in the ADSCR should be cleared if the ADC is not used. If the
ADC is in use and the internal bus clock is above 1MHz, it is recommended that the ADRC bit be
cleared.
In STOP mode, the ADC stops operation.
Table 7-1 ADC Channel Assignments
CH2
CH1
CH0
Channel
Selected Signal
0
AD0 on PD0
0
1
AD1 on PD1
0
1
0
2
AD2 on PD2
0
1
3
AD3 on PD3
10
0
4
VRH
10
1
5
VRL
11
0
6
(VRH–VRL) ÷ 4
11
1
7
(VRH–VRL) ÷ 2
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$0F
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
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TPG
52
05SR3.Book Page 4 Thursday, August 4, 2005 1:08 PM
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MC68HC705SR3CPE 制造商:Freescale Semiconductor 功能描述:8-Bit Microcontroller IC
MC68HC705SR3PE 功能描述:IC MCU 3.75K 2.1MHZ OTP 40-DIP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - 微控制器, 系列:HC05 标准包装:1 系列:AVR® ATmega 核心处理器:AVR 芯体尺寸:8-位 速度:16MHz 连通性:I²C,SPI,UART/USART 外围设备:欠压检测/复位,POR,PWM,WDT 输入/输出数:32 程序存储器容量:32KB(16K x 16) 程序存储器类型:闪存 EEPROM 大小:1K x 8 RAM 容量:2K x 8 电压 - 电源 (Vcc/Vdd):2.7 V ~ 5.5 V 数据转换器:A/D 8x10b 振荡器型:内部 工作温度:-40°C ~ 125°C 封装/外壳:44-TQFP 包装:剪切带 (CT) 其它名称:ATMEGA324P-B15AZCT
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