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参数资料
型号： MC68HCL05C12AFN
厂商： FREESCALE SEMICONDUCTOR INC
元件分类： 微控制器/微处理器
英文描述： 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC44
封装： PLASTIC, LCC-44
文件页数： 23/156页
文件大小： 3848K
代理商： MC68HCL05C12AFN
Electrical Specifications
3.3 V DC Electrical Characteristics
MC68HC05C12A — Rev. 3.0
General Release Specification
Electrical Specifications
NON-DISCLOSURE
AGREEMENT
REQUIRED
13.8 3.3 V DC Electrical Characteristics
Characteristic(1)
Symbol
Min
Typ(2)
Max
Unit
Output Voltage
ILoad = 10.0 A
ILoad = –10.0 A
VOL
VOH
—
V
DD–0.1
—
0.1
—
V
Output High Voltage
(ILoad = –0.2 mA) PA7–PA0, PB7–PB0, PC6–PC0, TCMP
(ILoad = –0.4 mA) PD4–PD1
(ILoad = –1.5 mA) PC7
VOH
V
DD–0.3
V
DD–0.3
V
DD–0.3
—
V
Output Low Voltage
(ILoad = 0.4 mA) PA7–PA0, PB7–PB0, PC6–PC0,
PD4–PD1, TCMP
(ILoad = 6 mA) PC7
VOL
—
0.3
V
Input High Voltage
PA7–PA0, PB7–PB0, PC7–PC0, PD7,
PD5–PD0, TCAP, IRQ, RESET, OSC1
VIH
0.7
×
V
DD
—V
DD
V
Input Low Voltage
PA7–PA0, PB7–PB0, PC7–PC0, PD7,
PD5–PD0, TCAP, IRQ, RESET, OSC1
VIL
V
SS
—
0.2
×
V
DD
V
Supply Current (3.0–3.6 Vdc @ f
BUS = 1.0 MHz)
Run(3)
Wait(4)
Stop(5)
25
°C
0
°C to +70 °C (Standard)
–40
°C to +85 °C (Standard)
IDD
—
1.00
500
1
—
1.60
900
8
16
20
mA
A
I/O Ports Hi-Z Leakage Current
PA7–PA0, PB7–PB0 (Without Pullup)
PC7–PC0, PD7, PD5–PD0
IOZ
——
±10
A
Input Current
RESET, IRQ, OSC1, TCAP, PD7, PD5, PD0
Iin
——
±1
A
Input Pullup Current (6)
PB7–PB0 (With Pullup)
Iin
75
175
350
A
Capacitance
Ports (as Input or Output)
RESET, IRQ, OSC1, TCAP, PD7, PD5, PD0
Cout
Cin
—
12
8
pF
NOTES:
1.
VDD = 3.3 Vdc ± 0.3 Vdc, VSS = 0 Vdc, TA = –40 °C to +85 °C, unless otherwise noted.
2.
Typical values reect measurements taken on average processed devices at the midpoint of voltage range, 25
°C only.
3.
Run (operating) IDD measured using external square wave clock source; all I/O pins congured as inputs,
Port B = VDD, all other inputs VIL = 0.2 V, VIH = VDD –0.2 V; no DC loads; less than 50 pF on all outputs;
C
L = 20 pF on OSC2.
4.
Wait IDD measured using external square wave clock source; all I/O pins congured as inputs,
Port B = VDD, all other inputs VIL = 0.2 V, VIH = VDD –0.2 V; no DC loads; less than 50 pF on all outputs;
CL = 20 pF on OSC2. Wait IDD is affected linearly by the OSC2 capacitance.
5.
Stop IDD measured with OSC1 = 0.2 V; all I/O pins congured as inputs, Port B = VDD, all other inputs
VIL = 0.2 V, VIH =VDD –0.2 V.
6.
Input pullup current measured with VIL = 0.2 V.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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