参数资料
型号: MC7447AVS867NB
厂商: Freescale Semiconductor
文件页数: 37/56页
文件大小: 0K
描述: IC MPU RISC 867MHZ 360-FCCLGA
标准包装: 44
系列: MPC74xx
处理器类型: 32-位 MPC74xx PowerPC
速度: 867MHz
电压: 1.1V
安装类型: 表面贴装
封装/外壳: 360-CLGA,FCCLGA
供应商设备封装: 360-FCCLGA(25x25)
包装: 托盘
MPC7447A RISC Microprocessor Hardware Specifications, Rev. 5
42
Freescale Semiconductor
System Design Information
Figure 19. JTAG Interface Connection
HRESET
HRESET 6
From Target
Board Sources
HRESET
13
SRESET
NC
11
VDD_SENSE
6
5 1
15
2 K
Ω
10 K
Ω
10 K
Ω
10 K
Ω
OVDD
CHKSTP_IN
8
TMS
TDO
TDI
TCK
TMS
TDO
TDI
TCK
9
1
3
4
TRST
7
16
2
10
12
(if any)
COP
He
ader
14 2
Key
QACK
OVDD
10 K
Ω
OVDD
10 K
Ω
OVDD
10 K
Ω
10 K
Ω
QACK
CHKSTP_OUT
3
13
9
5
1
6
10
2
15
11
7
16
12
8
4
KEY
No Pin
COP Connector
Physical Pin Out
10 K
Ω 4
OVDD
1
2 K
Ω 3
0
Ω 5
Notes:
1. RUN/STOP, normally found on pin 5 of the COP header, is not implemented on the MPC7447A. Connect
pin 5 of the COP header to OVDD with a 10-KΩ pull-up resistor.
2. Key location; pin 14 is not physically present on the COP header.
3. Component not populated. Populate only if debug tool does not drive QACK.
4. Populate only if debug tool uses an open-drain type output and does not actively negate QACK.
5. If the JTAG interface is implemented, connect HRESET from the target source to TRST from the COP
header though an AND gate to TRST of the part. If the JTAG interface is not implemented, connect
HRESET from the target source to TRST of the part through a 0-
Ω isolation resistor.
6. The COP port and target board should be able to independently assert HRESET and TRST to the
processor in order to fully control the processor as shown above.
TRST 6
10 K
Ω
OVDD
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