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参数资料
| 型号： | MC7448VU867ND |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 8/12页 |
| 文件大小： | 0K |
| 描述： | IC MPU RISC 32BIT 360-FCCBGA |
| 标准包装： | 1 |
| 系列： | MPC74xx |
| 处理器类型： | 32-位 MPC74xx PowerPC |
| 速度： | 867MHz |
| 电压： | 1V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 360-CBGA，FCCBGA |
| 供应商设备封装： | 360-FCCBGA（25x25） |
| 包装： | 托盘 |
MPC7448 Hardware Specifications Addendum for the MC7448xxnnnnNx Series, Rev. 6
Freescale Semiconductor
5
General Parameters
Table 7 provides the power consumption for the MPC7448 part numbers described by this document; see
Section 11.1, “Part Numbers Addressed by This Specification,” for more information. The MPC7448
RISC Microprocessor Hardware Specifications presents guidelines on the use of these parameters for
system design. For information on power consumption when dynamic frequency switching is enabled, see
Section 9.8.5, “Dynamic Frequency Switching (DFS),” in the hardware specifications.
The power consumptions provided in Table 7 represent the power consumption of each speed grade when
operated at the rated maximum core frequency (see Table 8). Freescale sorts devices by power as well as
by core frequency, and power limits for each speed grade are independent of each other. Each device is
tested at its maximum core frequency only. (Note that Deep Sleep Mode power consumption is
independent of clock frequency.) Operating a device at a frequency lower than its rated maximum is fully
supported provided the clock frequencies are within the specifications given in Table 8, and a device
operated at a core frequency below its rated maximum will have lower power consumption. However,
inferences should not be made about a device’s power consumption based on the power specifications of
another (lower) speed grade. For example, a 1267 MHz device operated at 1000 MHz may not exhibit the
same power consumption as a 1000 MHz device operated at 1000 MHz.
NOTE
The power consumption information in this table applies when the device
operates at the nominal core voltage indicated in Table 4. For power
consumption at derated core voltage conditions, see Section 5.3, “Voltage
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