参数资料
型号: MC74HC4538ADR2
厂商: ON Semiconductor
文件页数: 2/16页
文件大小: 0K
描述: IC MULTIVIBRTR DUAL MONO 16SOIC
标准包装: 1
系列: 74HC
逻辑类型: 单稳态
独立电路: 2
施密特触发器输入:
传输延迟: 30ns
输出电流高,低: 5.2mA,5.2mA
电源电压: 2 V ~ 6 V
工作温度: -55°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-SOIC(0.154",3.90mm 宽)
供应商设备封装: 16-SOIC
包装: 标准包装
其它名称: MC74HC4538ADRODKR
MC74HC4538ADRODKR-ND
MC74HC4538ADROSDKR
MC74HC4538A
http://onsemi.com
10
CIRCUIT OPERATION
Figure 12 shows the HC4538A configured in the
retriggerable mode. Briefly, the device operates as follows
(refer to Figure 10): In the quiescent state, the external
timing capacitor, Cx, is charged to VCC. When a trigger
occurs, the Q output goes high and Cx discharges quickly to
the lower reference voltage (Vref Lower
[ 1/3 VCC). Cx
then charges, through Rx, back up to the upper reference
voltage (Vref Upper
[ 2/3 VCC), at which point the
oneshot has timed out and the Q output goes low.
The following, more detailed description of the circuit
operation refers to both the logic detail (Figure 9) and the
timing diagram (Figure 10).
QUIESCENT STATE
In the quiescent state, before an input trigger appears, the
output latch is high and the reset latch is high (#1 in
Figure 10). Thus the Q output (pin 6 or 10) of the monostable
multivibrator is low (#2, Figure 10).
The output of the triggercontrol circuit is low (#3), and
transistors M1, M2, and M3 are turned off. The external
timing capacitor, Cx, is charged to VCC (#4), and both the
upper and lower reference circuit has a low output (#5).
In addition, the output of the triggercontrol reset circuit
is low.
TRIGGER OPERATION
The HC4538A is triggered by either a risingedge signal
at input A (#7) or a fallingedge signal at input B (#8), with
the unused trigger input and the Reset input held at the
voltage levels shown in the Function Table. Either trigger
signal will cause the output of the triggercontrol circuit to
go high (#9).
The triggercontrol circuit going high simultaneously
initiates two events. First, the output latch goes low, thus
taking the Q output of the HC4538A to a high state (#10).
Second, transistor M3 is turned on, which allows the
external timing capacitor, Cx, to rapidly discharge toward
ground (#11). (Note that the voltage across Cx appears at the
input of both the upper and lower reference circuit
comparator).
When Cx discharges to the reference voltage of the lower
reference circuit (#12), the outputs of both reference circuits
will be high (#13). The triggercontrol reset circuit goes high,
resetting the triggercontrol circuit flipflop to a low state
(#14). This turns transistor M3 off again, allowing Cx to begin
to charge back up toward VCC, with a time constant t = RxCx
(#15). Once the voltage across Cx charges to above the lower
reference voltage, the lower reference circuit will go low
allowing the monostable multivibrator to be retriggered.
2
18
1
6
5
4
17
14
3
9
8
QUIESCENT
STATE
TRIGGER CYCLE
(A INPUT)
TRIGGER CYCLE
(B INPUT)
RESET
RETRIGGER
trr
Vref UPPER
Vref LOWER
TRIGGER INPUT A
(PIN 4 OR 12)
TRIGGER INPUT B
(PIN 5 OR 11)
TRIGGER-CONTROL
CIRCUIT OUTPUT
RX/CX INPUT
(PIN 2 OR 14)
UPPER REFERENCE
CIRCUIT
RESET INPUT
(PIN 3 OR 13)
RESET LATCH
Q OUTPUT
(PIN 6 OR 10)
Figure 12. Timing Diagram
10
11
12
13
15
16
19
20
21
22
23
24
25
τ
τ + trr
13
τ
7
LOWER REFERENCE
CIRCUIT
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