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型号： MC8640DTVU1000HC
厂商： Freescale Semiconductor
文件页数： 58/130页
文件大小： 0K
描述： MPU DUAL E600 1023-FCCBGA
标准包装： 1
系列： MPC86xx
处理器类型： 32-位 MPC86xx PowerPC
速度： 1.0GHz
电压： 1.05V
安装类型： 表面贴装
封装/外壳： 1023-BCBGA，FCCBGA
供应商设备封装： 1023-FCCBGA（33x33）
包装： 散装
MPC8640 and MPC8640D Integrated Host Processor Hardware Specifications, Rev. 3
Freescale Semiconductor
33
Ethernet: Enhanced Three-Speed Ethernet (eTSEC), MII Management
Figure 14 provides the AC test load for eTSEC.
Figure 14. eTSEC AC Test Load
Figure 15 shows the MII receive AC timing diagram.
Figure 15. MII Receive AC Timing Diagram
8.2.4
TBI AC Timing Specifications
This section describes the TBI transmit and receive AC timing specifications.
RXD[3:0], RX_DV, RX_ER setup time to RX_CLK
tMRDVKH
10.0
—
ns
RXD[3:0], RX_DV, RX_ER hold time to RX_CLK
tMRDXKH
10.0
—
ns
RX_CLK clock rise time (20%–80%)
tMRXR
2
1.0—
4.0ns
RX_CLK clock fall time (80%–20%)
tMRXF
2
1.0—
4.0ns
Note:
1. The symbols used for timing specifications herein follow the pattern of t(first two letters of functional block)(signal)(state) (reference)(state)
for inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tMRDVKH symbolizes MII receive
timing (MR) with respect to the time data input signals (D) reach the valid state (V) relative to the tMRX clock reference (K)
going to the high (H) state or setup time. Also, tMRDXKL symbolizes MII receive timing (GR) with respect to the time data input
signals (D) went invalid (X) relative to the tMRX clock reference (K) going to the low (L) state or hold time. Note that, in general,
the clock reference symbol representation is based on three letters representing the clock of a particular functional. For
example, the subscript of tMRX represents the MII (M) receive (RX) clock. For rise and fall times, the latter convention is used
with the appropriate letter: R (rise) or F (fall).
2. Guaranteed by design.
3. ±100 ppm tolerance on RX_CLK frequency
Table 31. MII Receive AC Timing Specifications (continued)
At recommended operating conditions with L/TVDD of 3.3 V ± 5%.
Parameter
Symbol 1
Min
Typ
Max
Unit
Output
Z0 = 50 Ω
LVDD/2
RL = 50 Ω
RX_CLK
RXD[3:0]
tMRDXKL
tMRX
tMRXH
tMRXR
tMRXF
RX_DV
RX_ER
tMRDVKH
Valid Data
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