参数资料
型号: MC8641DTVU1000NC
厂商: Freescale Semiconductor
文件页数: 11/130页
文件大小: 0K
描述: MPU E600 DUAL CORE 1023-FCCBGA
标准包装: 1
系列: MPC86xx
处理器类型: 32-位 MPC86xx PowerPC
速度: 1.0GHz
电压: 0.95V
安装类型: 表面贴装
封装/外壳: 1023-BCBGA,FCCBGA
供应商设备封装: 1023-FCCBGA(33x33)
包装: 散装
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 2
108
Freescale Semiconductor
Clocking
18.4.1
SYSCLK to Platform Frequency Options
Table 70 shows some SYSCLK frequencies and the expected MPX frequency values based on the MPX
clock to SYSCLK ratio. Note that frequencies between 400 MHz and 500 MHz are NOT supported on the
platform. See note regarding cfg_platform_freq in Section 17, “Signal Listings,” because it is a reset
configuration pin that is related to platform frequency.
18.4.2
Platform to FIFO Restrictions
Please note the following FIFO maximum speed restrictions based on platform speed.
For FIFO GMII mode:
FIFO TX/RX clock frequency <= platform clock frequency/4.2
For example, if the platform frequency is 533 MHz, the FIFO TX/RX clock frequency should be no more
than 127 MHz
For FIFO encoded mode:
FIFO TX/RX clock frequency <= platform clock frequency/3.2
For example, if the platform frequency is 533 MHz, the FIFO TX/RX clock frequency should be no more
than 167 MHz
Table 70. Frequency Options of SYSCLK with Respect to Platform/MPX Clock Speed
MPX to
SYSCLK
Ratio
SYSCLK (MHz)
66
83
100
111
133
167
Platform/MPX Frequency (MHz)1
1 SYSCLK frequency range is 66-167 MHz. Platform clock/ MPX frequency
range is 400 MHz, 500-600 MHz.
2
3
400
500
4
400
533
5
500
555
6
400
500
600
8
533
9
600
相关PDF资料
PDF描述
MC8641DTVU1000GC MPU E600 DUAL CORE 1023-FCCBGA
SLW6R-5C7LF SLW6R-5C7LF FFC/FPC CONN
MC8641DTHX1333JC MPU E600 DUAL CORE 1023-FCCBGA
MPC8572EVTATLB MPU POWERQUICC III 1023-PBGA
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