参数资料
型号: MC8641VU1000NC
厂商: Freescale Semiconductor
文件页数: 68/130页
文件大小: 0K
描述: IC MPU SGL E600 CORE 994FCCBGA
标准包装: 1
系列: MPC86xx
处理器类型: 32-位 MPC86xx PowerPC
速度: 1.0GHz
电压: 0.95V
安装类型: 表面贴装
封装/外壳: 994-BCBGA,FCCBGA
供应商设备封装: 994-FCCBGA(33x33)
包装: 托盘
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 2
42
Freescale Semiconductor
Ethernet: Enhanced Three-Speed Ethernet (eTSEC), MII Management
8.2.7.2
RMII Receive AC Timing Specifications
Figure 21 provides the AC test load for eTSEC.
Figure 21. eTSEC AC Test Load
Figure 22 shows the RMII receive AC timing diagram.
Figure 22. RMII Receive AC Timing Diagram
Table 37. RMII Receive AC Timing Specifications
At recommended operating conditions with L/TVDD of 3.3 V ± 5%.
Parameter/Condition
Symbol 1
Min
Typ
Max
Unit
REF_CLK clock period
tRMR
15.0
20.0
25.0
ns
REF_CLK duty cycle
tRMRH/tRMR
35
50
65
%
REF_CLK peak-to-peak jitter
tRMRJ
250
ps
Rise time REF_CLK (20%–80%)
tRMRR
1.0
2.0
ns
Fall time REF_CLK (80%–20%)
tRMRF
1.0
2.0
ns
RXD[1:0], CRS_DV, RX_ER setup time to REF_CLK rising
edge
tRMRDV
4.0
ns
RXD[1:0], CRS_DV, RX_ER hold time to REF_CLK rising
edge
tRMRDX
2.0
ns
Note:
1. The symbols used for timing specifications herein follow the pattern of t(first two letters of functional block)(signal)(state) (reference)(state)
for inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tMRDVKH symbolizes MII receive
timing (MR) with respect to the time data input signals (D) reach the valid state (V) relative to the tMRX clock reference (K) going
to the high (H) state or setup time. Also, tMRDXKL symbolizes MII receive timing (GR) with respect to the time data input signals
(D) went invalid (X) relative to the tMRX clock reference (K) going to the low (L) state or hold time. Note that, in general, the
clock reference symbol representation is based on three letters representing the clock of a particular functional. For example,
the subscript of tMRX represents the MII (M) receive (RX) clock. For rise and fall times, the latter convention is used with the
appropriate letter: R (rise) or F (fall).
Output
Z0 = 50 Ω
LVDD/2
RL = 50 Ω
REF_CLK
RXD[1:0]
tRMRDX
tRMR
tRMRH
tRMRR
tRMRF
CRS_DV
RX_ER
tRMRDV
Valid Data
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