参数资料
型号: MC92460ZU
厂商: MOTOROLA INC
元件分类: 微控制器/微处理器
英文描述: 40 CHANNEL(S), 66.7M bps, SERIAL COMM CONTROLLER, PBGA480
封装: 37 X 37 MM, 1.70 MM HEIGHT, 1.27 MM PITCH, TBGA-480
文件页数: 9/15页
文件大小: 353K
代理商: MC92460ZU
MOTOROLA
MC92460 HDLC Controller Hardware Specications
3
Features
on the type of main memory used
— Up to four MC92460’s may be connected in parallel on the 60x bus
— Bus supports multiple master design
Communication Buffers
— Data Buffer
– 256 Kbits on-chip memory for data buffers
– 256 Kbit communication buffer can store up to 819 bytes per frame.
– 80 channel virtual DMA functionality executes between off-chip memory and the
communication buffer
— BD Buffer
– 32 Kbyte on-chip dual-port RAM for buffer descriptors
– A total of 4096 buffer descriptors (2048 TxBD and 2048 RxBD)
JTAG Support
— Supports the IEEE1149.1 JTAG controller standard
Power and Clocks
— Supports single-beat and burst accesses
— On-chip PLL for baud rate generator (maximum of 66.7 MHz)
— Separate power supplies for core internal logic (1.8V) and for I/O (3.3V)
Package
— 480 pin TPGA, 1.27 mm pitch
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