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| 型号： | MC9SD64VPVR2 |
| 厂商： | MOTOROLA INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQFP112 |
| 封装： | LQFP-112 |
| 文件页数： | 25/102页 |
| 文件大小： | 1007K |
| 代理商： | MC9SD64VPVR2 |
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MC9S12DJ64 Device User Guide — V01.02
29
2.3 Detailed Signal Descriptions
2.3.1 EXTAL, XTAL — Oscillator Pins
EXTAL and XTAL are the crystal driver and external clock pins. On reset all the device clocks are derived
from the EXTAL input frequency. XTAL is the crystal output.
2.3.2 RESET — External Reset Pin
An active low bidirectional control signal, it acts as an input to initialize the MCU to a known start-up
state, and an output when an internal MCU function causes a reset.
2.3.3 TEST — Test Pin
This input only pin is reserved for test.
NOTE:
The TEST pin must be tied to VSS in all applications.
PM4
RXCAN0
MOSI
—
Port M I/O, RX of CAN0, MOSI of SPI0
PM3
TXCAN0
SS0
—
Port M I/O, TX of CAN0, SS of SPI0
PM2
RXCAN0
MISO0
—
Port M I/O, RX of CAN0, MISO of SPI0
PM1
TXCAN0
TXB
—
Port M I/O, TX of CAN0, RX of BDLC
PM0
RXCAN0
RXB
—
Port M I/O, RX of CAN0, RX of BDLC
PP7
KWP7
PWM7
—
Port P I/O, Interrupt, Channel 7 of PWM
PP6
KWP6
PWM6
—
Port P I/O, Interrupt, Channel 6 of PWM
PP5
KWP5
PWM5
—
Port P I/O, Interrupt, Channel 5 of PWM
PP4
KWP4
PWM4
—
Port P I/O, Interrupt, Channel 4 of PWM
PP3
KWP3
PWM3
—
Port P I/O, Interrupt, Channel 3 of PWM
PP2
KWP2
PWM2
—
Port P I/O, Interrupt, Channel 2 of PWM
PP1
KWP1
PWM1
—
Port P I/O, Interrupt, Channel 1 of PWM
PP0
KWP0
PWM0
—
Port P I/O, Interrupt, Channel 0 of PWM
PS7
SS0
—
Port S I/O, SS of SPI0
PS6
SCK0
—
Port S I/O, SCK of SPI0
PS5
MOSI0
—
Port S I/O, MOSI of SPI0
PS4
MISO0
—
Port S I/O, MISO of SPI0
PS3
TXD1
—
Port S I/O, TXD of SCI1
PS2
RXD1
—
Port S I/O, RXD of SCI1
PS1
TXD0
—
Port S I/O, TXD of SCI0
PS0
RXD0
—
Port S I/O, RXD of SCI0
PT[7:0]
IOC[7:0]
—
Port T I/O, Timer channels
Pin Name
Function 1
Pin Name
Function 2
Pin Name
Function 3
Pin Name
Function 4
Description
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