参数资料
型号: MCF52223CVM66J
厂商: Freescale Semiconductor
文件页数: 11/55页
文件大小: 0K
描述: IC MCU 32BIT W/USB 81MAPBGA
标准包装: 240
系列: MCF5222x
核心处理器: Coldfire V2
芯体尺寸: 32-位
速度: 66MHz
连通性: I²C,SPI,UART/USART,USB OTG
外围设备: DMA,LVD,POR,PWM,WDT
输入/输出数: 56
程序存储器容量: 256KB(256K x 8)
程序存储器类型: 闪存
RAM 容量: 32K x 8
电压 - 电源 (Vcc/Vdd): 3 V ~ 3.6 V
数据转换器: A/D 8x12b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 81-LBGA
包装: 托盘
MCF5
2223
ColdFir
e
Micr
ocontr
olle
r,
Re
v
.
3
Freescale
Se
mi
condu
ctor
19
F
a
mi
ly
Con
fig
uratio
ns
UART 1
UCTS1
SYNCA
URXD2
GPIO
PDSR[15]
PSRR[15]
98
C3
61
URTS1
SYNCB
UTXD2
GPIO
PDSR[14]
PSRR[14]
4
B1
2
URXD1
GPIO
PDSR[13]
PSRR[13]
100
B2
63
UTXD1
GPIO
PDSR[12]
PSRR[12]
99
A2
62
UART 2
UCTS2
GPIO
PDSR[27]
PSRR[27]
27
URTS2
GPIO
PDSR[26]
PSRR[26]
30
URXD2
GPIO
PDSR[25]
PSRR[25]
28
UTXD2
GPIO
PDSR[24]
PSRR[24]
29
VSTBY
N/A
55
F8
37
USB
VDDUSB
N/A
62
D8
43
VSSUSB
N/A
59
F7
40
USB_DM
N/A
61
D9
42
USB_DP
N/A
60
E9
41
VDD
N/A
1,2,14,22,
23,34,41,
57,68,81,93
D5,E3–E7,
F5
1,10,20,39,5
2
VSS
N/A
3,15,24,25,3
5,42,56,
67,75,82,92
A1,A9,D4,D
6,F4,F6,J1
11,21,38,
53,64
1 The PDSR and PSSR registers are described in the General Purpose I/O chapter. All programmable signals default to 2 mA drive and FAST slew rate in
normal (single-chip) mode.
2 All signals have a pull-up in GPIO mode.
3 These signals are multiplexed on other pins.
4 For primary and GPIO functions only.
5 Only when JTAG mode is enabled.
6 CLKMOD0 and CLKMOD1 have internal pull-down resistors; however, the use of external resistors is very strongly recommended.
7 When these pins are configured for USB signals, they should use the USB transceiver’s internal pull-up/pull-down resistors (see the description of the
OTG_CTRL register). If these pins are not configured for USB signals, each pin should be pulled down externally using a 10 k
resistor.
8 For secondary and GPIO functions only.
9 RSTI has an internal pull-up resistor; however, the use of an external resistor is very strongly recommended.
10 For GPIO function. Primary Function has pull-up control within the GPT module.
Table 4. Pin Functions by Primary and Alternate Purpose (continued)
Pin
Group
Primary
Function
Secondary
Function
Tertiary
Function
Quaternary
Function
Drive
Strength /
Control1
Slew Rate /
Control1
Pull-up /
Pull-down2
Pin on
100 LQFP
Pin on 81
MAPBGA
Pin on 64
LQFP
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