参数资料
型号: MCF52277CVM160
厂商: Freescale Semiconductor
文件页数: 28/46页
文件大小: 0K
描述: IC MCU 32BIT 166.67MHZ 196MAPBGA
产品培训模块: MCF5227x LCD Processors
标准包装: 126
系列: MCF5227x
核心处理器: Coldfire V2
芯体尺寸: 32-位
速度: 166.67MHz
连通性: CAN,EBI/EMI,I²C,SPI,SSI,UART/USART,USB OTG
外围设备: DMA,LCD,PWM,WDT
输入/输出数: 55
程序存储器类型: ROMless
RAM 容量: 128K x 8
电压 - 电源 (Vcc/Vdd): 1.4 V ~ 1.6 V
振荡器型: 外部
工作温度: -40°C ~ 85°C
封装/外壳: 196-LBGA
包装: 托盘
MCF5227x ColdFire Microprocessor Data Sheet, Rev. 8
Electrical Characteristics
Freescale Semiconductor
34
5.12
SSI Timing Specifications
This section provides the AC timings for the SSI in master (clocks driven) and slave modes (clocks input). All timings are given
for non-inverted serial clock polarity (SSI_TCR[TSCKP] = 0, SSI_RCR[RSCKP] = 0) and a non-inverted frame sync
(SSI_TCR[TFSI] = 0, SSI_RCR[RFSI] = 0). If the polarity of the clock and/or the frame sync have been inverted, all the timings
remain valid by inverting the clock signal (SSI_BCLK) and/or the frame sync (SSI_FS) shown in the figures below.
P side Impedance
Driven
ZP
6.25
8.25
11.25
Ω
M side Impedance
Driven
ZM
6.25
8.25
11.25
Ω
Impedance Matching P/M
ZMatching
0.17
0.23
Ω
Pulldown Resistance1
RPD
30k
50k
70k
Ω
1 The pulldown resistors are included to provide a method to keep DP and DM signals in a known quiescent state
if desired when the USB port is not being used or when the USB cable is not connected. These on-chip
resistors should not be used to provide the 15-k
Ω host-mode pulldowns called for in Chapter 7 of the USB
Specification, Rev. 1.1 or Rev. 2.0.
Table 24. USB On-Chip Transceiver Full Speed AC Characteristics
Characteristic
Condition
Symbol
Min
Typ
Max
Unit
Rise Time
10–90%
tLH
711
17.5
ns
Fall Time
90–10%
tHL
711
17.5
ns
Rise/Fall Matching
Matching
20
40
60
ps
Rise/Fall Matching, DP and DM
Pad-to-Pad
330
360
640
ps
TIme Skew Between DP and DM
tSKE
100
140
210
ps
Table 25. USB On-Chip Transceiver Low Speed AC Characteristics
Characteristic
Condition
Symbol
Min
Typ
Max
Unit
Rise Time
10–90%
tLH
75
300
ns
Fall Time
90–10%
tHL
75
300
ns
Rise/Fall Matching
Matching
80
125
%
Table 26. SSI Timing—Master Modes1
Num
Characteristic
Symbol
Min
Max
Unit
Notes
S1
SSI_MCLK cycle time
tMCLK
4
× 1/f
SYS
—ns
2
S2
SSI_MCLK pulse width high / low
45%
55%
tMCLK
S3
SSI_BCLK cycle time
tBCLK
4
× 1/f
SYS
—ns
3
S4
SSI_BCLK pulse width
45%
55%
tBCLK
Table 23. USB On-Chip Transceiver DC Characteristics (continued)
Characteristic
Condition
Symbol
Min
Typ
Max
Unit
t
LH
t
HL
--------
t
LH
t
HL
--------
t
LH
t
HL
--------
t
LH
t
HL
--------
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