参数资料
型号: MCF5474VR266
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 266.66 MHz, RISC PROCESSOR, PBGA388
封装: 27 X 27 MM, MS-034AAL-1, PBGA-388
文件页数: 30/34页
文件大小: 600K
代理商: MCF5474VR266
DC Electrical Specifications
MCF547x ColdFire Microprocessor, Rev. 4
Freescale Semiconductor
5
3
DC Electrical Specifications
Table 4 lists DC electrical operating temperatures. This table is based on an operating voltage of EVDD = 3.3 VDC ± 0.3 VDC
and IVDD of 1.5 ± 0.07 VDC.
Junction to ambient (@200 ft/min)
Four layer board (2s2p)
θ
JMA
161,2
°C/W
Junction to board
θ
JB
113
°C/W
Junction to case
θ
JC
74
°C/W
Junction to top of package
Natural convection
Ψ
jt
°C/W
1
θ
JA and Ψjt parameters are simulated in accordance with EIA/JESD Standard 51-2 for natural convection. Freescale
recommends the use of
θ
JA and power dissipation specifications in the system design to prevent device junction
temperatures from exceeding the rated specification. System designers should be aware that device junction
temperatures can be significantly influenced by board layout and surrounding devices. Conformance to the device
junction temperature specification can be verified by physical measurement in the customer’s system using the
Ψ
jt
parameter, the device power dissipation, and the method described in EIA/JESD Standard 51-2.
2 Per JEDEC JESD51-6 with the board horizontal.
3 Thermal resistance between the die and the printed circuit board per JEDEC JESD51-8. Board temperature is
measured on the top surface of the board near the package.
4 Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883
Method 1012.1).
5 Thermal characterization parameter indicating the temperature difference between package top and the junction
temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is
written as Psi-JT.
Table 4. DC Electrical Specifications
Characteristic
Symbol
Min
Max
Units
External (I/O pads) operation voltage range
EVDD
3.0
3.6
V
Memory (I/O pads) operation voltage range (DDR Memory)
SD VDD
2.30
2.70
V
Internal logic operation voltage range1
IVDD
1.43
1.58
V
PLL Analog operation voltage range1
PLL VDD
1.43
1.58
V
USB oscillator operation voltage range
USB_OSVDD
3.0
3.6
V
USB digital logic operation voltage range
USBVDD
3.0
3.6
V
USB PHY operation voltage range
USB_PHYVDD
3.0
3.6
V
USB oscillator analog operation voltage range
USB_OSCAVDD
1.43
1.58
V
USB PLL operation voltage range
USB_PLLVDD
1.43
1.58
V
Input high voltage SSTL 3.3V/2.5V2
VIH
VREF + 0.3
SD VDD + 0.3
V
Input low voltage SSTL 3.3V/2.5V2
VIL
VSS - 0.3
VREF - 0.3
V
Input high voltage 3.3V I/O pins
VIH
0.7 x EVDD
EVDD + 0.3
V
Input low voltage 3.3V I/O pins
VIL
VSS - 0.3
0.35 x EVDD
V
Table 3. Thermal Resistance (continued)
Characteristic
Symbol
Value
Unit
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